6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range, unless otherwise noted(1)

MIN

MAX

UNIT

Voltage

VDD

–0.3

6.5

V

Voltage

CWD, CRST, WD–EN, SETx, WDI, MR (2), WDO (Push Pull)

–0.3

VDD+0.3 (3)

V

RESET (Open Drain), WDO (Open Drain)

–0.3

6.5

Current

WDO pin

–20

20

mA

Temperature (4)

Operating ambient temperature, TA

–40

125

℃

Temperature

Storage, Tstg

–65

150

(1)

Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress

ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated

under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2)

If the logic signal driving MR is less than VDD, then additional current flows into VDD and out of MR.

(3)

The absolute maximum rating is (VDD + 0.3) V or 6.5 V, whichever is smaller

(4)

As a result of the low dissipated power in this device, it is assumed that TJ = TA.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC

JS-001(1)

± 2000

V

Charged device model (CDM), per JEDEC specification

JESD22-C101(2)

± 750

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

Voltage

VDD (Active Low output)

0.9

6

V

CWD, CRST, WD–EN, SETx, WDI, MR (1)

0

VDD

RESET (Open Drain) , WDO (Open Drain)

0

6

RESET (Open Drain) , WDO (Push Pull)

0

VDD

Current

RESET, WDO pin current

–5

5

mA

CRST

CRST pin capacitor range

1.5

1800

nF

CWD

CWD pin capacitor range

1.5

1000

nF

TA

Operating ambient temperature

–40

125

℃

(1)

If the logic signal driving MR is less than VDD, then additional current flows into VDD and out of MR. VMR should not be higher than VDD.

TPS35

SNVSCF5A – JUNE 2023 – REVISED DECEMBER 2023

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