6.6 Electrical Characteristics

At 1.04 V ≤ VDD ≤ 6 V, MR = Open, RESET pull-up resistor (Rpull-up) = 100 kΩ to VDD, WDO pull-up resistor (Rpull-up) = 100

kΩ to VDD, output load (CLOAD) = 10 pF and over operating free-air temperature range –40℃ to 125℃, unless otherwise

noted. VDD ramp rate ≤ 1 V/µs. Typical values are at TA = 25℃

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

COMMON PARAMETERS

VDD

Input supply voltage

Active LOW output

1.04

6

V

VIT–

Negative-going input threshold accuracy

(1)

VIT– = 1.05 V to 1.95 V

–1.4

±0.5

1.4

%

VIT– = 2.0 V to 5.4 V

–1.2

±0.5

1.2

VHYS

Hysteresis VIT– pin

VIT– = 1.05 V to 5.4 V

3

5

7

%

IDD

Supply current into VDD pin (2)

VDD = 2 V

VIT– = 1.05 V to 1.95

V

TA = –40℃ to

85

℃

0.25

0.8

µA

0.25

3

VDD = 6 V

VIT– = 1.05 V to 5.4 V

TA = –40℃ to

85

℃

0.25

0.8

0.25

3

VIL

Low level input voltage WD–EN, WDI,

SETx, MR (2)

0.3VDD

V

VIH

High level input voltage WD–EN, WDI,

SETx, MR (2)

0.7VDD

V

RMR

Manual reset internal pull-up resistance

100

kΩ

RESET / WDO (Open-drain active-low)

VOL

Low level output voltage

VDD =1.5 V, 1.55 V ≤ VIT– ≤ 3.35 V

IOUT(Sink) = 500 µA

300

mV

VDD = 3.3 V, 3.4 V ≤ VIT– ≤ 5.4 V

IOUT(Sink) = 2 mA

300

mV

Ilkg(OD)

Open-Drain output leakage current

VDD = VPULLUP = 6V

TA = –40℃ to 85℃

10

30

nA

VDD = VPULLUP = 6V

10

120

nA

RESET / WDO (Push-pull active-low)

VPOR

Power on RESET voltage (3)

VOL(max) = 300 mV

IOUT(Sink) = 15 µA

900

mV

VOL

Low level output voltage

VDD = 0.9 V, 1.05 V ≤ VIT– ≤ 1.5 V

IOUT(Sink) = 15 µA

300

mV

VDD = 1.5 V, 1.55 V ≤ VIT– ≤ 3.35 V

IOUT(Sink) = 500 µA

300

VDD = 3.3 V, 3.4 V ≤ VIT– ≤ 5.4 V

IOUT(Sink) = 2 mA

300

VOH

High level output voltage

VDD = 1.8 V, 1.05 V ≤ VIT– ≤ 1.4 V

IOUT(Source) = 500 µA

0.8VDD

V

VDD = 3.3 V, 1.45 V ≤ VIT– ≤ 3.0 V

IOUT(Source) = 500 µA

0.8VDD

VDD = 6 V, 3.05 V ≤ VIT– ≤ 5.4 V

IOUT(Source) = 2 mA

0.8VDD

(1)

VIT– threshold voltage range from 1.05 V to 5.4 V in 50 mV steps.

(2)

If the logic signal driving MR is less than VDD, then additional current flows into VDD and out of MR.

(3)

VPOR is the minimum VDD voltage level for a controlled output state

TPS35

SNVSCF5A – JUNE 2023 – REVISED DECEMBER 2023

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