TMP114 datasheet(17/41 Pages) TI

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7.3.4 Strain Tolerance

The TMP118 features internal strain tolerance that helps mitigate error resulting from strain developed in the

PicoStar package from various common manufacturing areas, including but not limited to device solder, molding,

under-fill, and board flex.

To demonstrate this capability, multiple TMP118 devices are soldered onto a rigid 62mil thick PCB, and tested

under multiple compression and tensile flexing orientations, with pin 1 located both orthogonal and parallel to

the applied microstrain examined during the test, measured through a strain gauge. The test is performed under

room temperature condition (30°C) VDD of 1.8V, and continuous conversion mode (1Hz conversion interval) with

8x averaging turned on. The resultant temp error under this strain is measured against a known reference,

and are recorded at increasing flex levels of the PCB. Figure 7-6 demonstrates device distribution under these

microstrain conditions. Several non-strain tolerant devices were also subjected to the same test to demonstrate

the difference.

Microstrain (

m/m)

300

600

900

1200

1500

-80

-60

-40

-20

TMP118

Non strain tolerant device

Figure 7-6. Temperature Error vs. Strain

7.3.5 NIST Traceability

The TMP118 offers 3Unique ID registers to support NIST traceability. These unique IDs can be used to

provide an audit trail to standards provided by the National Institute of Standards and Technology (NIST), a

US Commerce Department agency.

Reading the Unique ID registers requires a specific procedure to retrieve the content from the memory. The

procedure is as follows:

1. Place the device in Shutdown Mode by setting bit 8 of Register 01h to 1b.

2. Write 0x0000 to desired Unique ID pointer address (0Ch, 0Dh, or 0Eh).

3. Read Unique ID from the same pointer address.

4. Repeat step #2 above for each pointer address as desired.

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TMP118

SNIS237 – DECEMBER 2024

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TMP114 Datasheet(PDF) 17 Page - Texas Instruments