LM3101 datasheet(4/20 Pages) NSC

4 / 20 page

Note 1

Absolute Maximum Ratings indicate limits beyond which damage to the device may occur Operating Ratings indicate conditions for which the device is

intended to be functional but do not guarantee specific performance limits For guaranteed specifications and test conditions see the Electrical Characteristics

Note 2

The reference voltage is measured at the error amplifier’s output with the error amplifier connected as a non-inverting amplifier with a gain of one

Note 3

The temperature coefficients of VREF or FO are defined as the worst-case DVREF or DFO measured at Specified Temperatures divided by the total span of

the Specified Temperture Range (see graphs) There is no guarantee that the Specified Temperatures are exactly at the minimum of maximum deviation

Note 4

The frequency of the internal oscillator is set by connecting a resistor RT from pin 1 to ground See detailed description of this feature in the Pin-by-Pin

Description section or the Functional Description of this datasheet

Note 5

A resistor RSC is connected from pin 5 to the regulator’s output See detailed description of this feature in the Pin-by-Pin Description section or the

Functional Description section of this datasheet

Note 6

For this test the frequency of synchronization FSYNC is 600 kHz CSYNC is 220 pF and RSYNC is1kX The internal oscillator will synchronize to an AC

signal that is 11 to 15 times the free running oscillator frequency FO See Functional Description section or Pin-by-Pin Description section for more detail on

synchronization

Note 7

ICOMP is sourced from pin 6 (CMI) See Functional Description section or Pin-by-Pin Description section for more detail on current mode operation

Note 8

Minimum duty cycle is the smallest duty cycle that can be produced by the LM3101 in a given oscillator period The controller can operate with effectively

zero duty cycleit skips cycles if the regulation cannot be maintained with the minimum duty cycle This means that the output voltage of the switching converter is

regulated down to no load

Note 9

The current sense time delay is the time span between an input applied to the CMI pin (pin 6) and the change of state of VOUT (pin 8) due to the input

Note 10

Both these specifications %VTHC and %VTHP are relative to the nominal feedback voltage VFB by the factor (VTH–VFB)VFB

Note 11

An internal delay circuit prevents triggering of the overvoltage crowbar circuit for pulse widths less than 400 ns to ensure noise immunity

Note 12

This is the minimum supply voltage for which the power-on reset flag will continue to be valid (low)

Note 13

For VS k VUV the output is offit is in a high-impedance state

Note 14

A resistorcapacitor circuit is normally connected from the soft start circuit pin 3 to ground The circuit provides a slow or ‘‘soft’’ start of the IC by slowly

ramping the reference voltage from a lower initial value set by the resistor to its normal operating value See detailed description of this feature in the Pin-by-Pin

Description section or the Functional Description section of this datasheet

Connection Diagram and Ordering Information

14-Lead Package

Top View

TLH11436 – 2

For Surface Mount Package

Order Number LM3101M

See NS Package Number M14B

For DIP Package

Order Number LM3101N

See NS Package Number N14A

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