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TAS3204 Datasheet(PDF) 67 Page - Texas Instruments |
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TAS3204 Datasheet(HTML) 67 Page - Texas Instruments |
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67 / 72 page ![]() www.ti.com TAS3204 AUDIO DSP WITH ANALOG INTERFACE SLES197 – APRIL 2007 Table 9-25. Extended Special Fucntion Registers (ESFR) (continued) ESFR MAPPED_TO NO. OF DIRECTION CONNECTING REGISTER TYPE DESCRIPTION BITS BLOCK 1-bit asynchronous rstz Write enable signal to the audio DSP D8(4) micro_wr_en_i_t 1 OUT DSP positive edge triggered coefficients and DATA RAMs Reset low 1-bit asynchronous rstz Sets the DSP in host mode. Microprocessor D8(5) host_DSP_o 1 OUT DSP positive edge triggered is in control Reset high 1-bit asynchronous rstz Microprocessor notifies T/B block that bass D8(6) bass_data_ready_o 1 OUT T/B positive edge triggered data has been processed and is ready. Reset low 1-bit asynchronous rstz Microprocessor notifies T/B block that treble D8(7) treble_data_ready_o 1 OUT T/B positive edge triggered data has been processed and is ready. Reset low Audio DSP coefficient/data 00 (Depending on address bit 10) 2-bit asynchronous rstz 01 Audio DSP instruction D9 MEM_SEL 2 OUT MICRO DAP positive edge triggered Reset low 10 Microprocessor instruction 11 Reserved 1-bit asynchronous rstz Select Master or Slave mode by switching FC i2c_ms_ctl 1 OUT positive edge triggered I2C mux Reset low 1-bit asynchronous rstz Changes source from microprocessor FD pc_source 1 OUT positive edge triggered program ROM to microprocessor program Reset low RAM 1-bit asynchronous rstz Expected to toggle high, then low, to inspire FE sap_en_t 1 OUT SAP positive edge triggered a recent SAP change to activate. Reset Low Submit Documentation Feedback 67 I2C Register Map |
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