TAS3204 datasheet(33/72 Pages) TI

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Digital Audio Processor (DAP) Arithmetic Unit

TAS3204

AUDIO DSP

WITH ANALOG INTERFACE

SLES197 – APRIL 2007

The DAP arithmetic unit is a fixed-point computational engine consisting of an arithmetic unit and data and

coefficient memory blocks. The primary features of the DAP are:

• Two pipe parallel processing architecture

–

48-bit data path with 76-bit accumulator

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Hardware single cycle multiplier (28

×48)

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Three 48-bit general-purpose data registers and one 28-bit coefficient register

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Four simultaneous operations per machine cycle

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Shift right, shift left and bi-modal clip

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Log2/Alog2

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Magnitude Truncation

• Hardware acceleration units

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Soft volume controller

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Delay memory

–

Dither generator

–

log2/2

× estimator

• 1024 + 768 dual port ports words of data (24 and 48 bits, respectively)

• 1228 words of coefficient memory (28 bits)

• 3K word of program RAM (55 bits)

• 5.88K words of 24-bits delay memory (1.22 ms)

• Coefficient RAM, data RAM, LFSR seed, program counter, and memory pointers are all mapped into

the same memory space for convenient addressing by the microcontroller.

• Memory interface block contains four pointers, two for data memory and two for coefficient memory.

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Digital Audio Processor (DAP) Arithmetic Unit

TAS3204 Datasheet(PDF) 33 Page - Texas Instruments

TAS3204 Datasheet(HTML) 33 Page - Texas Instruments

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