HV256 datasheet(5/11 Pages) SUTEX

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HV256

SINK / RSOURCE

The V

DD_BYP ,VDD_BYP ,and VNN_BYP pins are internal. high impedance

current. mirror gate nodes, brought out to mantain stable opamp

biasing currents in noisy power supply environments. 0.1uF/25V

bypass capacitors, added from V

PP_BYP pin to VPP , from VDD_BYP pin

to V

DD , and from VNN_BYP to VNN,will force the high impedance gate

nodes to follow ﬂuctuation of power lines. The expected voltages

at the V

DD_BYP, and VNN_BYP pins

are typically 1.5 volts from their

respectful power supply. The expected voltage at V

PP_BYP is typically

3V below V

PP.

BYP _VPP

HVOpamp

VDD

VPP

BYP _VNN

VNN

Set by RSOURCE

Set by RSINK

HVOUT0

BYP _VPP Cap

BYP _VNN Cap

Current limit

BYP _VDD

BYP _VDD Cap

To internal biasing

0.1uF / 25V

HVOpamp

HVOUT31

Typical Characteristics

ISINK vs RSINK

(VPP = 300V, VDD = 6.5V, VNN = 5.5V, TA = 25OC)

RSINK (KΩ)

100

200

300

400

500

600

25k

150k

250k

min

max

min

max

ISOURCE vs RSOURCE

(VPP = 300V, VDD = 6.5V, VNN = 5.5V, TA = 25OC)

RSOURCE (KΩ)

100

200

300

400

500

600

25k

150k

250k

HV256 Datasheet(PDF) 5 Page - Supertex, Inc

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