TMP88CS34FG datasheet(40/215 Pages) TOSHIBA

40 / 215 page

TMP88CS34/CP34

2007-09-12

88CS34-40

Note:

Corrective address must be assigned to 1st byte of instruction codes on the program jump

mode.

(2) Data replacement mode

In the data replacement mode, the system replaces reference data stored in the ROM

area with the new instead of correcting the data reference instruction when that reference

data is changed.

The program jump mode reduces the complexity of correcting the processing routine.

However, when this mode is used, if there is a need to replace only the fixed data in ROM,

the instruction to reference this ROM data should be corrected. Thus, a large amount of

ROM is required for the patch program. To avoid this, the system has the data replacement

mode. With this mode, three consecutive bytes of data can be replaced for each bank. (For

an instruction which accesses only one byte, only the first byte can be replaced. For an

instruction which accesses only two bytes, the two consecutive bytes can be replaced.)

Setting ROMCCR CMx (x: 0 to 3) to “1” puts the system in the data replacement mode.

Specify the start address of ROM data to be replaced as the corrective ROM address. Then,

specify the new three-byte data as the patch data.

Note:

For data replacement mode, the corrective address should be the address of fixed data

(including a vector). (The operation code and operand cannot be changed.)

Example 1: Setting the Program Correction Circuit with the Initial Routine

Using the initial routine program, which is executed right after reset, set the

program correction circuit's register as follows.

Read the flag, which indicates whether to use the program correction circuit, from

the external memory.

If that circuit is not used, perform normal initial processing.

If it is used, set CMx to “1” to establish the data replacement mode.

Read the address of the data to be replaced and the patch data from the external

memory.

Set the address and patch data, which were read in step 4., in ROMCDR.

Repeat steps 4. and 5. as many times as there are required banks.

JP 0C086H

DBR

SFR

RAM

00000H

0003FH

00040H

006BFH

00F80H

00FFFH

04000H

FFFFFH

ROM

Bug area

0C020H

0C085H

0C086H

Patch

program

Return

00400H

004EFH

004F0H

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