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TMP88CS42FG Datasheet(PDF) 72 Page - Toshiba Semiconductor |
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TMP88CS42FG Datasheet(HTML) 72 Page - Toshiba Semiconductor |
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72 / 216 page ![]() Page 62 7. Watchdog Timer (WDT) 7.2 Watchdog Timer Control TMP88CS42FG 7.2.3 Watchdog Timer Disable To disable the watchdog timer, set the register in accordance with the following procedures. Setting the reg- ister in other procedures causes a malfunction of the microcontroller. 1. Set the interrupt master flag (IMF) to “0”. 2. Set WDTCR2 to the clear code (4EH). 3. Set WDTCR1<WDTEN> to “0”. 4. Set WDTCR2 to the disable code (B1H). Note:While the watchdog timer is disabled, the binary counters of the watchdog timer are cleared. Note: If the watchdog timer is disabled during watchdog timer interrupt processing, the watchdog timer interrupt will never be cleared. Therefore, clear the watchdog timer ( set the clear code (4EH) to WDTCR2 ) before disabling it, or disable the watchdog timer a sufficient time before it overflows. 7.2.4 Watchdog Timer Interrupt (INTWDT) When WDTCR1<WDTOUT> is cleared to “0”, a watchdog timer interrupt request (INTWDT) is generated by the binary-counter overflow. A watchdog timer interrupt is the non-maskable interrupt which can be accepted regardless of the interrupt master flag (IMF). When a watchdog timer interrupt is generated while the other interrupt including a watchdog timer interrupt is already accepted, the new watchdog timer interrupt is processed immediately and the previous interrupt is held pending. Therefore, if watchdog timer interrupts are generated continuously without execution of the RETN instruction, too many levels of nesting may cause a malfunction of the microcontroller. To generate a watchdog timer interrupt, set the stack pointer before setting WDTCR1<WDTOUT>. Example :Disabling the watchdog timer DI : IMF ← 0 LD (WDTCR2), 04EH : Clears the binary coutner LDW (WDTCR1), 0B101H : WDTEN ← 0, WDTCR2 ← Disable code EI : IMF ← 1 Table 7-1 Watchdog Timer Detection Time (Example: fc = 20 MHz) WDTT Watchdog Timer Detection Time[s] NORMAL Mode DV1CK = 0 DV1CK = 1 00 1.678 3.355 01 419.430 m 838.861 m 10 104.858 m 209.715 m 11 26.214 m 52.429 m |
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