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TMP88CS42FG Datasheet(PDF) 73 Page - Toshiba Semiconductor

Part # TMP88CS42FG
Description  8 Bit Microcontroller
PDF  216 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP88CS42FG Datasheet(HTML) 73 Page - Toshiba Semiconductor

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Page 63
TMP88CS42FG
7.2.5 Watchdog Timer Reset
When a binary-counter overflow occurs while WDTCR1<WDTOUT> is set to “1”, a watchdog timer reset
request is generated. When a watchdog timer reset request is generated, the internal hardware is reset. The reset
time is maximum 24/fc [s] ( max. 1.2
µs @ fc = 20 MHz).
Figure 7-2 Watchdog timer Interrupt and Reset
Example :Setting watchdog timer interrupt
LD
SP, 08BFH
: Sets the stack pointer
LD
(WDTCR1), 00001000B
: WDTOUT
← 0
Clock
Binary counter
Overflow
INTWDT interrupt request
(WDTCR1<WDTOUT>= "0")
217/fc
219/fc [s]
(WDTT=11B)
Write 4EH to WDTCR2
1
2
30
1
2
3
0
Internal reset
(WDTCR1<WDTOUT>= "1")
A reset occurs



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