EM78452 datasheet(36/54 Pages) EMC

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EM78452

8-Bit Microcontroller

•

Product Specification (V1.0) 10.18.2007

(This specification is subject to change without further notice)

5.7 Reset and Wake-up

A reset is initiated by

(1) Power-on reset, or

(2) /RESET pin input “low”, or

(3) WDT timeout. (if enabled)

WDTE

Setup

Time

WDT

WDT timeout

Power-

on Reset

Voltage

Detector

Oscillator

VDD

CLK

CLR

CLK

Reset

Fig. 5-15 Block Diagram of Reset

The EM78452 POR voltage range is between 1.2V~2.0V. Under customer application,

when power is OFF, the Vdd must drop below 1.2V and remains OFF for 10

μs before

power can be switched ON again. This way, the EM78452 will reset and work normally.

The extra external reset circuit will work well if Vdd can rise at very fast speed (50 ms or

less). However, in most cases where critical applications are involved, extra devices

are required to assist in solving the power-up problem.

The device is kept in a RESET condition for a period of approx. 18ms

2 (one oscillator

start-up timer period) after the reset is detected and Fig. 5-15 is the block diagram of

reset. Once the RESET occurs, the following functions are performed.

The oscillator is running, or will be started.

The Program Counter (R2) is set to all "1".

When power is switched on, Bits 5~6 of R3 and the upper 2 bits of R4 are cleared.

All I/O port pins are configured as input mode (high-impedance state).

The Watchdog timer and prescaler are cleared.

2 Vdd = 5V, set up time period = 16.20ms ± 30%

Vdd = 3V, set up time period = 18.0ms ±30%

EM78452 Datasheet(PDF) 36 Page - ELAN Microelectronics Corp

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