LM63 datasheet(12/44 Pages) TI2

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Remote High Limit

RDTS Measurement

Time

ALERT mask set in

response to ARA

from master

LM63

ALERT Pin

Status Register: Remote High

LM63

SNAS190E – SEPTEMBER 2002 – REVISED MAY 2013

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The LM63 fulfills “disengaging of ALERT” by setting the ALERT Mask Bit in the Configuration Register after

sending out its address in response to an ARA and releasing the ALERT output pin. Once the ALERT Mask bit is

activated, the ALERT output pin will be disabled until enabled by software. In order to enable the ALERT the

master must read the ALERT Status Register, during the interrupt service routine and then reset the ALERT

Mask bit in the Configuration Register to 0 at the end of the interrupt service routine.

The following sequence describes the ARA response protocol.

1. Master senses SMBus alert line low

2. Master sends a START followed by the Alert Response Address (ARA) with a Read Command.

3. Alerting Device(s) send ACK.

4. Alerting Device(s) send their address. While transmitting their address, alerting devices sense whether their

address has been transmitted correctly. (The LM63 will reset its ALERT output and set the ALERT Mask bit

once its complete address has been transmitted successfully.)

5. Master/slave NoACK

6. Master sends STOP

7. Master attends to conditions that caused the ALERT to be triggered. The ALERT Status Register is read and

fan started, setpoints adjusted, etc.

8. Master resets the ALERT Mask bit in the Configuration Register.

The ARA, 000 1100, is a general call address. No device should ever be assigned to this address.

The ALERT Configuration bit in the Remote Diode Temperature Filter and Comparator Mode Register must be

set low in order for the LM63 to respond to the ARA command.

The ALERT output can be disabled by setting the ALERT Mask bit in the Configuration Register. The power-on

default is to have the ALERT Mask bit and the ALERT Configuration bit low.

Figure 9. ALERT Output as an SMBus ALERT Temperature Response Diagram

SMBus INTERFACE

Since the LM63 operates as a slave on the SMBus the SMBCLK line is an input and the SMBDAT line is bi-

directional. The LM63 never drives the SMBCLK line and it does not support clock stretching. According to

SMBus specifications, the LM63 has a 7-bit slave address. All bits, A6 through A0, are internally programmed

and cannot be changed by software or hardware.

The complete slave address is:

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