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LM96080 Datasheet(PDF) 24 Page - Texas Instruments

Part # LM96080
Description  LM96080 System Hardware Monitor with 2-Wire Serial Interface
PDF  36 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
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LM96080 Datasheet(HTML) 24 Page - Texas Instruments

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LM96080
SNAS465D – SEPTEMBER 2009 – REVISED MARCH 2013
www.ti.com
Address Pointer Index (A7–A0)
Power On Value of Registers:
Registers and RAM
A7–A0 in Hex
<7:0> in Binary
Configuration Register
00h
0000 1000
Interrupt Status Register 1
01h
0000 0000
Interrupt Status Register 2
02h
0000 0000
Interrupt Mask Register 1
03h
0000 0000
Interrupt Mask Register 2
04h
0000 0000
Fan Divisor/RST_OUT/OS
05h
0001 0100
OS Configuration/Temperature Resolution
06h
0000 0001
Register
Conversion Rate Register
07h
0000 0000
Channel Disable Register
08h
0000 0000
Value RAM
20h – 3Fh
Register 3Eh defaults to 0000 0001
Register 3Fh defaults to 0000 1000
Configuration Register—Address 00h
Power on default <7:0> = 00001000 binary
Bit
Name
Read/Write
Description
0
Start
Read/Write
A one enables startup of monitoring operations, a zero puts the part in shutdown mode.
Note: Unlike the "INT_Clear" bit, the outputs of Interrupt pins will not be cleared if the user writes a
zero to this location after an interrupt has occurred. At startup, limit checking functions and scanning
begin. Note, all limits should be set in the Value RAM before setting this bit HIGH.
1
INT Enable
Read/Write
A one enables the INT Interrupt output.
2
INT Polarity
Read/Write
A one selects an active high open source output while a zero selects an active low open drain
Select
output.
3
INT_Clear
Read/Write
A one disables the INT output without affecting the contents of Interrupt Status Registers. The
device will stop monitoring. It will resume upon clearing of this bit.
4
RESET
Read/Write
A one outputs at least a 10 ms active low reset signal at RST_OUT, if bit 7 and bit 6 in the Fan
Divisor/RST_OUT/OS Register (address 05h) = 1 and = 0, respectively. This bit is cleared once the
pulse has gone inactive.
5
Chassis Clear
Read/Write
A one clears the GPI (Chassis Intrusion) pin. This bit clears itself after 10 ms.
6
GPO
Read/Write
A one drives the GPO (General Purpose Output) pin low.
7
INITIALIZATION
Read/Write
A one restores power on default value to the Configuration Register, Interrupt Status Registers,
Interrupt Mask Registers, Fan Divisor/RST_OUT/OS Register, the OS Configuration/Temperature
Resolution Register, Conversion Rate, Channel Disable, Manufacturers ID and Stepping/Die
revision ID registers. This bit clears itself. The power-on default is zero.
Interrupt Status Register 1—Address 01h
Power on default <7:0> = 0000 0000 binary
Bit
Name
Read/Write
Description
0
IN0
Read Only
A one indicates a High or Low limit has been exceeded.
1
IN1
Read Only
A one indicates a High or Low limit has been exceeded.
2
IN2
Read Only
A one indicates a High or Low limit has been exceeded.
3
IN3
Read Only
A one indicates a High or Low limit has been exceeded.
4
IN4
Read Only
A one indicates a High or Low limit has been exceeded.
5
IN5
Read Only
A one indicates a High or Low limit has been exceeded.
6
IN6
Read Only
A one indicates a High or Low limit has been exceeded.
7
INT_IN
Read Only
A one indicates that a Low has been detected on the INT_IN.
24
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