D7

D6

D5

D4

D3

D2

D1

D0

1

9

1

9

Ack

by

Slave

Start by

Master

R/W

Ack

by

Slave

Frame 1

Serial Bus Address Byte

from Master

Frame 2

Internal Address Register

Byte from Master

D7

D6

D5

D4

D3

D2

D1

D0

1

9

1

9

Ack

by

Slave

No Ack

by

Master

Stop

by

Master

1

9

D15 D14 D13 D12 D11 D10 D9

D8

Ack

by

Master

Frame 3

Serial Bus Address Byte

from Master

Frame 4

Data Byte from

Slave

Frame 5

Data Byte from

Slave

R/W

A2

A0

A1

A3

A4

A5

A6

Repeat

Start by

Master

A2

A0

A1

A3

A4

A5

A6

SCL

SDA

SCL

(continued)

SDA

(continued)

D7

D6

D5

D4

D3

D2

D1

D0

1

9

1

9

Ack

by

Slave

Start by

Master

R/W

Ack

by

Slave

Frame 1

Serial Bus Address Byte

from Master

Frame 2

Internal Address Register

Byte from Master

D7

D6

D5

D4

D3

D2

D1

D0

1

9

Ack

by

Slave

No Ack

by

Master

Stop

by

Master

1

9

Frame 3

Serial Bus Address Byte

from Master

Frame 4

Data Byte from

Slave

R/W

A2

A0

A1

A3

A4

A5

A6

Repeat

Start by

Master

A2

A0

A1

A3

A4

A5

A6

SCL

SDA

SCL

(continued)

SDA

(continued)

D7

D6

D5

D4

D3

D2

D1

D0

1

9

1

9

Ack

by

Slave

Start by

Master

No Ack

by

Master

SCL

SDA

Stop

by

Master

1

9

D15 D14 D13 D12 D11 D10 D9

D8

Ack

by

Master

Frame 1

Serial Bus Address Byte

from Master

Frame 2

Data Byte from

Slave

Frame 3

Data Byte from

Slave

R/W

A2

A0

A1

A3

A4

A5

A6

D7

D6

D5

D4

D3

D2

D1

D0

1

9

Ack

by

Slave

Start by

Master

No Ack

by

Master

SCL

SDA

Stop

by

Master

1

9

Frame 1

Serial Bus Address Byte

from Master

Frame 2

Data Byte from

Slave

R/W

A2

A0

A1

A3

A4

A5

A6

LM96080

www.ti.com

SNAS465D – SEPTEMBER 2009 – REVISED MARCH 2013

Figure 10. Single Byte Read from Register with Preset Internal Address Register

Figure 11. Double Byte Read from Register with Preset Internal Address Register

Figure 12. Single Byte Read from Register with Internal Address Set using a Repeat Start

Figure 13. Double Byte Read from Register with Internal Address Set using a Repeat Start

The Serial Bus control lines include the SDA (serial data), SCL (serial clock), and A0-A2 (address) pins. The

LM96080 can only operate as a slave. The SCL line only controls the serial interface, all other clock functions

within LM96080 such as the ADC and fan counters are done with a separate asynchronous internal clock.

Copyright © 2009–2013, Texas Instruments Incorporated

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