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LM96080 Datasheet(PDF) 12 Page - Texas Instruments |
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LM96080 Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 36 page  D7 D6 D5 D4 D3 D2 D1 D0 1 9 1 9 Ack by Slave Start by Master R/W Ack by Slave Frame 1 Serial Bus Address Byte from Master Frame 2 Internal Address Register Byte from Master 1 9 Ack by Slave Frame 3 Data Byte D3 D1 D2 D4 D5 D6 D7 A2 A0 A1 A3 A4 A5 A6 SCL SDA SCL (continued) SDA (continued) Stop by Master D0 D7 D6 D5 D4 D3 D2 D1 D0 1 9 1 9 Ack by Slave Start by Master R/W Ack by Slave Frame 1 Serial Bus Address Byte from Master Frame 2 Internal Address Register Byte from Master A2 A0 A1 A3 A4 A5 A6 SCL SDA Stop by Master LM96080 SNAS465D – SEPTEMBER 2009 – REVISED MARCH 2013 www.ti.com INTERFACE Internal Registers of the LM96080 Table 1. The internal registers and their corresponding internal LM96080 address are as follows: Register LM96080 Internal Power on Value Notes Address (Hex) (Binary) Configuration Register 00h 0000 1000 Interrupt Status Register 1 01h 0000 0000 Interrupt Status Register 2 02h 0000 0000 Interrupt Mask Register 1 03h 0000 0000 Interrupt Mask Register 2 04h 0000 0000 Fan Divisor/RST_OUT/OS Register 05h 0001 0100 FAN1 and FAN2 divisor = 2 (count of 153 = 4400 RPM) OS/ Configuration/ Temperature Resolution 06h 0000 0001 Register Conversion Rate Register 07h 0000 0000 Voltage/Temperature Channel Disable 08h 0000 0000 Allows voltage monitoring inputs to be Register disabled Value RAM 20h - 29h Indeterminate Input and FAN readings Value RAM 2Ah - 3Dh Indeterminate Limit Registers Value RAM 3Eh 0000 0001 Manufacturer's ID Value RAM 3Fh 0000 1000 Stepping/Die Revision ID Serial Bus Interface/Serial Bus Timings Figure 8. Internal Address Register Set Only Figure 9. Internal Address Register Set with Data Byte Write 12 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: LM96080 |
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