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LMH0026 Datasheet(PDF) 3 Page - Texas Instruments |
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LMH0026 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 16 page ![]() LMH0026 NC RSVD OP MUTE XTAL IN/EXT CLK LF2 LF1 SDI SDI VCC BP/ AUTO-BP 1 2 3 4 5 6 7 8 9 10 SCO_EN 11 12 13 14 15 16 17 18 19 20 XTAL OUT LOCK DET SCO/SDO2 SCO/SDO2 VCCO VCCO SDO SDO SD LMH0026 www.ti.com SNLS253B – MARCH 2008 – REVISED APRIL 2013 CONNECTION DIAGRAM The exposed die attach pad is the negative electrical terminal for this device. It must be connected to the negative power supply voltage. Figure 1. 20-Pin HTSSOP PIN DESCRIPTIONS Pin Name Description 1 LF1 Loop Filter. 2 LF2 Loop Filter. 3 NC No Connect. Not bonded internally. 4 RSVD Reserved. Do not connect or connect to ground. 5 SDI Data Input true. 6 SDI Data Input complement. 7 VCC Positive power supply input. Bypass/Auto Bypass mode select. Bypasses reclocking when high. This pin has an internal 8 BYPASS/AUTO BYPASS pulldown. Data and Clock Output Mute input. Mutes the output when low. This pin has an internal 9 OUTPUT MUTE pullup. 10 XTAL IN/EXT CLK Crystal or External Oscillator input. 11 XTAL OUT Crystal Oscillator output. 12 LOCK DETECT PLL Lock Detect output (active high). 13 SCO/SDO2 Serial Clock or Serial Data Output 2 complement. 14 SCO/SDO2 Serial Clock or Serial Data Output 2 true. 15 VCCO Positive power supply input (Output Driver). 16 SDO Data Output complement. 17 SDO Data Output true. 18 VCCO Positive power supply input (output driver). 19 SD SD indicator output. Output is high when locked to 270 Mbps. Serial Clock or Serial Data 2 Output select. Sets second output to output the clock when 20 SCO_EN high and the data when low. This pin has an internal pulldown. DAP VEE Connect exposed DAP to negative power supply (ground). Copyright © 2008–2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LMH0026 |
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