SDI

VCC

VCC

SDI

2 k:

80 k:

1 pF

20 k:

VCC

2 k:

LMH0026

SNLS253B – MARCH 2008 – REVISED APRIL 2013

www.ti.com

DEVICE DESCRIPTION

The LMH0026 SD SDI Reclocker is used in many types of digital video signal processing equipment. The

LMH0026 supports the SMPTE 259M (C) serial digital video standard, with a corresponding serial data rate of

270 Mbps. DVB-ASI data at 270 Mbps may also be retimed. The LMH0026 retimes the serial data stream to

suppress accumulated jitter. It provides two low-jitter, differential, serial data outputs. The second output may be

selected to output either serial data or a low-jitter serial data-rate clock. Controls and indicators are: serial data-

rate clock or second serial data output select, SD indicator output, lock detect output, auto/manual data bypass,

and output mute.

Serial data inputs are CML and LVPECL compatible. Serial data and data-rate clock outputs are differential CML

and produce LVPECL compatible levels. The output buffer design can drive AC or DC-coupled, terminated 100

Ω

differential loads. The differential output level is 800 mVP-P ±10% into 100Ω AC or DC-coupled differential loads.

Logic inputs and outputs are LVCMOS compatible.

The device package is an HTSSOP-20 with an exposed die attach pad. The exposed die attach pad is

electrically connected to device ground (VEE) and is the negative electrical terminal for the device. This terminal

must be connected to the negative power supply or circuit ground.

Serial Data Inputs, Serial Data and Clock Outputs

SERIAL DATA INPUT AND OUTPUTS

The differential serial data input, SDI, accepts 270 Mbps serial digital video data. The serial data input is

differential LVPECL compatible. The input is intended to be DC interfaced to devices such as the LMH0074

adaptive cable equalizer. The input is not internally terminated or biased. The input may be AC-coupled if a

suitable input bias voltage is provided. Figure 2 shows the equivalent input circuit for SDI and SDI.

The LMH0026 has two, retimed, differential, serial data outputs, SDO and SCO/SDO2. These outputs provide

low jitter, differential, retimed data to devices such as the LMH0001 or LMH0002 cable driver. Output SCO/SDO2

is multiplexed and can provide either a second serial data output or a serial data-rate clock output. Figure 3

shows the equivalent output circuit for SDO, SDO, SCO/SDO2, and SCO/SDO2.

The SCO_EN input controls the operating mode for the SCO/SDO2 output. When the SCO_EN input is high the

SCO/SDO2 output provides a serial data-rate clock. When SCO_EN is low, the SCO/SDO2 output provides

retimed serial data.

Both differential serial data outputs, SDO and SCO/SDO2, are muted when the OUTPUT MUTE input is a logic

low level. SCO/SDO2 also mutes when the Bypass mode is activated when this output is operating as the serial

clock output. When muted, SDO and SDO (or SDO2 and SDO2) will assume opposite differential output levels.

The CML serial data outputs are differential LVPECL compatible. These outputs have internal 50

Ω pull-ups and

are suitable for driving AC or DC-coupled, 100

Ω center-tapped, AC grounded or 100Ω un-center-tapped,

differentially terminated networks.

Figure 2. Equivalent SDI input Circuit (SDI, SDI)

6

Submit Documentation Feedback

Copyright © 2008–2013, Texas Instruments Incorporated

Product Folder Links: LMH0026