PCM1850

PCM1851

SLES108 − MARCH 2004

www.ti.com

20

BCK

LRCK

DOUT

t(BCKH)

t(BCKL)

t(CKLR)

t(LRCP)

t(BCKP)

t(CKDO)

t(LRDO)

0.5 VDD

0.5 VDD

0.5 VDD

SYMBOL

PARAMETER

MIN

TYP

MAX

UNIT

t(BCKP)

BCK period

150

1/(64 fS)

1000

ns

t(BCKH)

BCK pulse duration, HIGH

60 0.5 t(BCKP)

400

ns

t(BCKL)

BCK pulse duration, LOW

60 0.5 t(BCKP)

400

ns

t(CKLR)

Delay time, BCK falling edge to LRCK valid

–10

20

ns

t(LRCP)

LRCK period

10

1/fS

60

µs

t(CKDO)

Delay time, BCK falling edge to DOUT valid

–10

20

ns

t(LRDO)

Delay time, LRCK edge to DOUT valid

–10

20

ns

tr

Rise time of all signals

10

ns

tf

Fall time of all signals

10

ns

NOTE: Timing measurement reference level is (VIH + VIL) / 2. Rise and fall times are measured from 10%

to 90% of IN/OUT signal swing. Load capacitance of all signals is 20 pF.

Figure 25. Audio Data Interface Timing (Master Mode: LRCK, BCK Work as Outputs)