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PCM4201 Datasheet(PDF) 14 Page - Texas Instruments |
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PCM4201 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 28 page  PCM4201 SBAS342B − DECEMBER 2004 − REVISED APRIL 2006 www.ti.com 14 System Clock Indeterminate or Inactive 1024 System Clock Periods Required for Initialization V CC V DD SCKI Internal Reset (1) V DD nominal range is +1.8V to +3.6V. ~4.0V 0.6 x V DD Nominal(1) 0V 0V 0V 0V Figure 7. Power-On Reset Sequence 0V 0V 0V t RSTL > 40ns 1024 System Clock Periods Required for Initialization SCKI RST Internal Reset Figure 8. External Reset Sequence Valid Output Data Valid Output Data Outputs Forced Low Outputs Forced Low for 1024 SCKI Periods Initialization Period Internal Reset Output Data Pins HI LO Figure 9. ADC Digital Output State for Reset Operation |
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