Electronic Components Datasheet Search
  English  ▼

X  

LP5523 Datasheet(PDF) 43 Page - Texas Instruments

Part # LP5523
Description  LP5523 Nine-Channel RGB- and White-LED Driver With Internal Program Memory and Integrated Charge Pump – DSBGA Package
PDF  61 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LP5523 Datasheet(HTML) 43 Page - Texas Instruments

Back Button LP5523 Datasheet HTML 39Page - Texas Instruments LP5523 Datasheet HTML 40Page - Texas Instruments LP5523 Datasheet HTML 41Page - Texas Instruments LP5523 Datasheet HTML 42Page - Texas Instruments LP5523 Datasheet HTML 43Page - Texas Instruments LP5523 Datasheet HTML 44Page - Texas Instruments LP5523 Datasheet HTML 45Page - Texas Instruments LP5523 Datasheet HTML 46Page - Texas Instruments LP5523 Datasheet HTML 47Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 43 / 61 page
background image
DIMMING
CONTROL
STEP COUNT
1
2
4
3
5
6
7
8
0
STEP TIME
SPAN =
187.5ms
TIME ELAPSED (ms)
375
750
1125
1500
140
141
142
143
144
145
146
147
148
0
RAMP INSTRUCTION
43
LP5523
www.ti.com
SNVS550E – SEPTEMBER 2009 – REVISED JANUARY 2017
Product Folder Links: LP5523
Submit Documentation Feedback
Copyright © 2009–2017, Texas Instruments Incorporated
(1)
Valid for numerical operands.
(2)
Valid for variables.
Figure 25. Example of Ramp Instruction
7.6.4.3 Set_PWM
This instruction is used for setting the PWM value on the outputs D1 to D9 without any ramps. Set PWM output
value from 0 to 255 with PWM value bits [7:0]. Instruction execution takes sixteen 32 kHz clock cycles (=488 µs).
NAME
VALUE (d)
DESCRIPTION
PWM value (i)(1)
0 - 255
PWM output duty cycle 0 - 100%
variable (ii)(2)
0 - 3
0 = local variable A
1 = local variable B
2 = global variable C
3 = register address 3CH variable D value, or register address 42H value.
7.6.4.4 Wait
When a wait instruction is executed, the engine is set in wait status, and the PWM values on the outputs are
frozen.
NAME
VALUE (d)
DESCRIPTION
prescale
0
Divide master clock (32.7 kHz) by 16 which means 0.488-ms cycle time.
1
Divide master clock (32 768 Hz) by 512 which means 15.625-ms cycle time.
time
1 - 31
Total wait time is = (time) × (prescale). Maximum 484 ms, minimum 0.488 ms.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com