LM89

SNIS128D – AUGUST 2002 – REVISED JUNE 2014

www.ti.com

12 Layout

12.1 Layout Guidelines

In a noisy environment, such as a processor mother board, layout considerations are very critical. Noise induced

on traces running between the remote temperature diode sensor and the LM89 can cause temperature

conversion errors. Keep in mind that the signal level the LM89 is trying to measure is in microvolts. The following

guidelines should be followed:

1. VDD should be bypassed with a 0.1µF capacitor in parallel with 100pF. The 100pF capacitor should be placed

as close as possible to the power supply pin. A bulk capacitance of approximately 10µF needs to be in the

near vicinity of the LM89.

2. A 2.2nF diode bypass capacitor is required to filter high frequency noise. Place the 2.2nF capacitor as close

as possible to the LM89's D+ and D

− pins. Make sure the traces to the 2.2nF capacitor are matched.

3. Ideally, the LM89 should be placed within 10cm of the Processor diode pins with the traces being as straight,

short and identical as possible. Trace resistance of 1

Ω can cause as much as 1°C of error. This error can be

compensated by using the Remote Temperature Offset Registers, since the value placed in these registers

will automatically be subtracted from or added to the remote temperature reading.

4. Diode traces should be surrounded by a GND guard ring to either side, above and below if possible. This

GND guard should not be between the D+ and D

− lines. In the event that noise does couple to the diode

lines it would be ideal if it is coupled common mode. That is equally to the D+ and D

− lines.

5. Avoid routing diode traces in close proximity to power supply switching or filtering inductors.

6. Avoid running diode traces close to or parallel to high speed digital and bus lines. Diode traces should be

kept at least 2cm apart from the high speed digital traces.

7. If it is necessary to cross high speed digital traces, the diode traces and the high speed digital traces should

cross at a 90 degree angle.

8. The ideal place to connect the LM89's GND pin is as close as possible to the Processors GND associated

with the sense diode.

9. Leakage current between D+ and GND should be kept to a minimum. One nanoampere of leakage can

cause as much as 1°C of error in the diode temperature reading. Keeping the printed circuit board as clean

as possible will minimize leakage current.

12.2 Layout Example

Figure 18. Ideal Diode Trace Layout

28

Submit Documentation Feedback

Copyright © 2002–2014, Texas Instruments Incorporated

Product Folder Links: LM89