BOARD LAYOUT GUIDELINES

OPA3695

www.ti.com ............................................................................................................................................... SBOS355A – APRIL 2008 – REVISED SEPTEMBER 2008

feedback resistor, rather than a direct short, is

required for the unity-gain follower application. A

Achieving

optimum

performance

with

a

current-feedback

op

amp

requires

a

feedback

high-frequency

amplifier

such

as

the

OPA3695

resistor—even

in

the

unity-gain

follower

requires careful attention to PCB layout parasitics and

configuration—to control stability. Good axial metal

external component types. Recommendations that

film or surface-mount resistors have approximately

optimize OPA3695 performance include:

0.2pF in shunt with the resistor. For resistor values

greater than 2.0k

Ω, this parasitic capacitance can

a) Minimize parasitic capacitance to any ac ground

add a pole and/or zero below 400MHz that can affect

for all of the signal I/O pins. Parasitic capacitance on

circuit operation. Keep resistor values as low as

the output can cause instability; on the noninverting

possible consistent with load driving considerations.

input, it can react with the source impedance to

cause

unintentional

bandlimiting.

To

reduce

d) Connections to other wideband devices on the

unwanted capacitance, create a window around the

PCB may be made with short direct traces or through

signal I/O pins in all of the ground and power planes

onboard transmission lines. For short connections,

around those pins. Otherwise, ground and power

consider the trace and the input to the next device as

planes should be unbroken elsewhere on the board.

a lumped capacitive load. Relatively wide traces

(50mils to 100mils, or 1,27mm to 2,54mm) should be

b) Minimize the distance (< 0.25” or 6,35mm) from

used, preferably with ground and power planes

the

power-supply

pins

to

high-frequency

0.1

µF

opened up around them. Estimate the total capacitive

decoupling capacitors. At the device pins, the ground

load and set RS from the plot of Recommended RS vs

and power-plane layout should not be in close

Capacitive Load (Figure 33). Low parasitic capacitive

proximity to the signal I/O pins. Avoid narrow power

loads (< 4pF) may not need an RS because the

and ground traces to minimize inductance between

OPA3695 is nominally compensated to operate with a

the

pins

and

the

decoupling

capacitors.

The

2pF parasitic load. If a long trace is required, and the

power-supply

connections

should

always

be

6dB signal loss intrinsic to a doubly-terminated

decoupled with these capacitors. Larger (2.2

µF to

transmission line is acceptable, implement a matched

6.8

µF) decoupling capacitors, effective at lower

impedance transmission line using microstrip or

frequency, should also be used on the supply pins.

stripline techniques (consult an ECL design handbook

These capacitors may be placed somewhat farther

for microstrip and stripline layout techniques). A 50

Ω

from the device and may be shared among several

environment is normally not necessary on board, and

devices in the same area of the PCB.

in fact, a higher impedance environment improves

c) Careful selection and placement of external

distortion, as shown in the distortion versus load

components

preserve

the

high-frequency

plots. With a characteristic board trace impedance

performance of the OPA3695. Use resistors that

defined

based

on

board

material

and

trace

have

low

reactance

at

high

frequencies.

dimensions, a matching series resistor into the trace

Surface-mount resistors work best and allow a tighter

from the output of the OPA3695 is used, as well as a

overall layout. Metal film and carbon composition

terminating

shunt

resistor

at

the

input

of

the

axially-leaded

resistors

can

also

provide

good

destination

device.

Remember

also

that

the

high-frequency performance. Again, keep the leads

terminating impedance is the parallel combination of

and PCB trace length as short as possible. Never use

the shunt resistor and the input impedance of the

wirewound

type

resistors

in

a

high-frequency

destination device; this total effective impedance

application. The output pin and inverting input pin are

should be set to match the trace impedance. If the

the most sensitive to parasitic capacitance; therefore,

6dB attenuation of a doubly-terminated transmission

always position the series output resistor, if any, as

line

is

unacceptable,

a

long

trace

can

be

close as possible to the output pin. Other network

series-terminated at the source end only. Treat the

components, such as noninverting input termination

trace as a capacitive load in this case and set the

resistors, should also be placed close to the package.

series resistor value as illustrated in the plot of

Where double-side component mounting is allowed,

Figure 33. This configuration does not preserve signal

place

the

feedback

resistor

directly

under

the

integrity as well as a doubly-terminated line. If the

package on the other side of the board between the

input impedance of the destination device is low,

output and inverting input pins. The frequency

there will be some signal attenuation as a result of

response is primarily determined by the feedback

the voltage divider formed by the series output into

resistor value, as described previously. Increasing its

the terminating impedance.

value reduces the bandwidth, while decreasing it

gives a more peaked frequency response. The 604

Ω

feedback resistor (used in the typical performance

specifications at a gain of +2V/V on ±5V supplies) is

a good starting point for design. Note that a 909

Ω

Copyright © 2008, Texas Instruments Incorporated

Submit Documentation Feedback

21

Product Folder Link(s): OPA3695