−140

−120

−100

−80

−60

−40

−20

0

0

50

100

150

200

250

300

350

400

450

500

Frequency (kHz)

AVDD = 5 V

VREF = 2.5 V internal

fSAMPLE = 1 MHz

fIN = 49.9115 kHz

fSCLK = 20 MHz

SNR =72.145 dB

THD = −87.844 dB

G033

ADS8028

430 pF

24.9

Ÿ

+

OPA836

VS+

VS+

AC

2

NŸ

2

NŸ

1

NŸ

+5V

0.25V W 2.25V

-2V W +2V

47 pF

ADS8028

SBAS549B – MAY 2011 – REVISED MARCH 2012

www.ti.com

The ac performance of the circuit in Figure 40 was tested with a 2.36-VPP (–0.5 dBFS), 49.911499023-kHz input

sine wave. The FFT of the sampled input signal with 8192 samples is shown in Figure 41. The high-precision

input signal frequency used to achieve coherent sampling without a windowing function is applied to the data

prior to the Fourier Transform. Figure 41 shows that this driver circuit allows the ADS8028 to operate at full

throughput within typical characteristic specifications.

Figure 41. FFT Showing OPA836 Buffer and ADS8028 AC Performance

The ADC drive circuitry may also function to scale output signals from a sensor to the full input voltage range of

the ADS8028 to take advantage of the full ADC dynamic range. It is likely that the input signal range will not

match the ADS8028 voltage range (0 V to VREF). Input signals to the ADC may need to be amplified, attenuated,

or level-shifted. In Figure 42, a resistor network is added in the circuit prior to the OPA836 buffer that can

attenuate and level-shift signals. The input signal in Figure 42 is bipolar and is scaled to a unipolar signal for use

in the single-supply circuit. The added resistor network does not significantly increase power consumption or load

the sensor if large resistor values are chosen. The trade-off to using large resistor values is the added thermal

noise injected into the signal path. A shunt capacitor (47 pF shown) is then added between the resistor network

and OPA836 buffer such that the desired input signal is minimally attenuated while higher frequency thermal

noise is removed.

More ADC analog interface design details and a step-by-step design example are provided in the Applications

Journal article, Sensor to ADC--analog interface design (SLYT173).

Figure 42. OPA836 Buffer with Voltage Scaling

The TINA-TI simulation file of this circuit can be downloaded by clicking the following link: OPA836 Buffer with

Voltage Scaling.

26

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