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Mechanical Data

7.1 Thermal Data for ZCE

7.1.1 Packaging Information

TMS320DM355

Digital Media System-on-Chip (DMSoC)

SPRS463D – SEPTEMBER 2007 – REVISED FEBRUARY 2008

The following table(s) show the thermal resistance characteristics for the PBGA – ZCE mechanical

package.

Note

that

micro-vias

are

not

required.

Contact

your

representative

for

routing

recommendations.

The following table shows the thermal resistance characteristics for the PBGA – ZCE mechanical

package.

Table 7-1. Thermal Resistance Characteristics (PBGA Package) [ZCE]

NO.

°C/W(1)

ΘJC

Junction-to-case

7.2

ΘJB

Junction-to-board

11.4

ΘJA

Junction-to-free air

27.0

PsiJT

Junction-to-package top

0.1

PsiJB

Junction-to-board

11.3

(1)

The junction-to-case measurement was conducted in a JEDEC defined 2S2P system and will change based on environment as well as

application. For more information, see these three EIA/JEDEC standards:

•

EIA/JESD51-2, Integrated Circuits Thermal Test Method Environment Conditions - Natural Convection (Still Air)

•

EIA/JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages

•

JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages

The following packaging information and addendum reflect the most current data available for the

designated device(s). This data is subject to change without notice and without revision of this document.

Note that micro-vias are not required for this package.

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