MCP4728 datasheet(10/50 Pages) MICROCHIP

10 / 50 page

MCP4728 Evaluation Board User’s Guide

DS51837A-page 6

FIGURE 1-1:

Front View of the MCP4728 Evaluation Board.

TABLE 1-1:

TEST TERMINALS ON THE MCP4728 EVALUATION BOARD

Test

Terminals

Description

VOUT A

DAC channel A output

VOUT B

DAC channel B output

VOUT C

DAC channel C output

VOUT D

DAC channel D output

SCL

This terminal is connected to the I2C SCL pin of the MCP4728.

(See Note 1).

SDA

This terminal is connected to the I2C SDA pin of the MCP4728.

(See Note 1).

RDY/BUSY

This terminal is used to monitor the RDY/BUSY pin of the MCP4728 device.

LDAC

Access terminal to the LDAC pin of the MCP4728.

Switch to change the logic input to the LDAC input pin. It provides logic “low”

when pressed.

JP1

Jumper to select the VDD source to the MCP4728 Evaluation Board. If it is

connected, the VDD from the J1 connector is connected. If disconnected, it

selects the VDD source from VDD1 terminal.

JP2

Jumper to connect the LDAC pin to VSS. (You can disconnect this jumper

when S1 is used.)

VDD1

VDD monitoring or connection pin.

If the VDD is provided from J1 connector (PICkit Serial Analyzer), then this

test point monitors the VDD voltage. You can also connect a new VDD to this

test terminal.

GND

Connected to common ground plane of the PC Board.

Note 1:

This terminal is used to monitor the SCL or SDA signals. You can also provide the

SCL or SDA signals through these pins.

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