PCM3070 datasheet(24/50 Pages) TI2

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PCM3070

SLAS724A – SEPTEMBER 2008 – REVISED NOVEMBER 2014

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Feature Description (continued)

10.3.1.1.1

Multifunction Pins

Table 1 shows the possible allocation of pins for specific functions. The PLL input, for example, can be

programmed to be any of 4 pins (MCLK, BCLK, DIN, GPIO).

Table 1. Multifunction Pin Assignments

Pin Function

MCLK

BCLK

WCLK

DIN

DOUT

MFP3/

MFP4/

GPIO

MFP1

MFP2

SCLK

MISO

MFP5

PLL Input

S(1)

S(2)

S(3)

Codec Clock Input

S(1),D(4)

S(2)

S(3)

I2S BCLK input

S,D

I2S BCLK output

E(5)

I2S WCLK input

E, D

I2S WCLK output

I2S ADC word clock input

I2S ADC WCLK out

I2S DIN

E, D

I2S DOUT

E, D

General Purpose Output I

General Purpose Output II

General Purpose Output III

General Purpose Input I

General Purpose Input II

General Purpose Input III

INT1 output

INT2 output

Secondary I2S BCLK input

Secondary I2S WCLK in

Secondary I2S DIN

Secondary I2S DOUT

Secondary I2S BCLK OUT

Secondary I2S WCLK OUT

Reserved

Aux Clock Output

(1)

S(1): The MCLK pin can drive the PLL and Codec Clock inputs simultaneously.

(2)

S(2): The BCLK pin can drive the PLL and Codec Clock and audio interface bit clock inputs simultaneously.

(3)

S(3): The GPIO/MFP5 pin can drive the PLL and Codec Clock inputs simultaneously.

(4)

D: Default Function

(5)

E: The pin is exclusively used for this function, no other function can be implemented with the same pin. (If GPIO/MFP5 has been

allocated for General Purpose Output, it cannot be used as the INT1 output at the same time.)

10.3.1.2 Analog Pins

Analog functions can also be configured to a large degree. Analog blocks are powered down by default. The

blocks can be powered up with fine granularity according to the application needs.

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