PCM3070 datasheet(13/50 Pages) TI2

13 / 50 page

PCM3070

www.ti.com

SLAS724A – SEPTEMBER 2008 – REVISED NOVEMBER 2014

8.8 Electrical Characteristics, LDO

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

LOW DROPOUT REGULATOR (AVdd)

LDOMode = 1, LDOIN > 1.95V

1.67

Output Voltage

LDOMode = 0, LDOIN > 2.0V

1.72

LDOMode = 2, LDOIN > 2.05V

1.77

Output Voltage Accuracy

±2%

Load Regulation

Load current range 0 to 50mA

Line Regulation

Input Supply Range 1.9V to 3.6V

Decoupling Capacitor

μF

Bias Current

μA

8.9 Electrical Characteristics, Misc.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

REFERENCE

CMMode = 0 (0.9V)

0.9

Reference Voltage Settings

CMMode = 1 (0.75V)

0.75

Reference Noise

CM = 0.9V, A-weighted, 20Hz to 20kHz bandwidth,

μVRfcMS

Cref = 10μF

Decoupling Capacitor

μF

miniDSP(1)

Maximum miniDSP clock frequency - ADC

DVDD = 1.65V

55.3

MHz

Maximum miniDSP clock frequency - DAC

DVDD = 1.65V

55.3

MHz

Shutdown Current

Coarse AVdd supply turned off, LDO_select held at

Device Setup

ground, No external digital input is toggled

I(DVDD)

0.9

μA

I(IOVDD)

(1)

miniDSP clock speed is specified by design and not tested in production.

8.10 Electrical Characteristics, Logic Levels

(1)

At 25°C, AVDD, DVDD, IOVDD = 1.8V

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

LOGIC FAMILY

CMOS

IIH = 5 μA, IOVDD > 1.6V

0.7 × IOVDD

VIH

Logic Level

IIH = 5μA, 1.2V ≤ IOVDD < 1.6V

0.9 × IOVDD

IIH = 5μA, IOVDD < 1.2V

IOVDD

IIL = 5 μA, IOVDD > 1.6V

–0.3

0.3 × IOVDD

VIL

IIL = 5μA, 1.2V ≤ IOVDD < 1.6V

0.1 × IOVDD

IIL = 5μA, IOVDD < 1.2V

VOH

IOH = 2 TTL loads

0.8 × IOVDD

VOL

IOL = 2 TTL loads

0.1 × IOVDD

Capacitive Load

(1)

Applies to all DI, DO, and DIO pins shown in Pin Configuration and Functions.

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