LDOIN

HPR

DVSS

DVDD

LDO_SELECT

GPIO/MFP5 (32)

SDA/MOSI

MISO/MFP4

SPI_SELECT

IN1_L

IN1_R

IN2_L

IN2_R

RESET

SCL/SSZ

HPL

1

8

9

16

17

24

25

32

PCM3070

SLAS724A – SEPTEMBER 2008 – REVISED NOVEMBER 2014

www.ti.com

7 Pin Configuration and Functions

This document describes signals that take on different names depending on how they are configured. In such

cases, the different names are placed together and separated by slash (/) characters. For example, "SCL/SS".

Active low signals are represented by overbars.

QFN Package

(Bottom View)

Pin Functions

PIN

NAME

TYPE(1)

DESCRIPTION

1

MCLK

DI

Master Clock Input

2

BCLK

DIO

Audio serial data bus (primary) bit clock

3

WCLK

DIO

Audio serial data bus (primary) word clock

4

DIN

DI

Primary function:

Audio serial data bus data input

MFP1

Secondary function:

General Purpose Clock Input

General Purpose Input

5

DOUT

DO

Primary function:

Audio serial data bus data output

MFP2

Secondary function:

General Purpose Output

Clock Output

INT1 Output

INT2 Output

Audio serial data bus (secondary) bit clock output

Audio serial data bus (secondary) word clock output

6

IOVDD

Power

IO voltage supply 1.1V – 3.6V

7

IOVSS

Ground

IO ground supply

(1)

DI (Digital Input), DO (Digital Output), DIO (Digital Input/Output), AI (Analog Input), AO (Analog Output), AIO (Analog Input/Output)

4

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