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TMP442 Datasheet(PDF) 21 Page - Texas Instruments |
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TMP442 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 57 page ![]() S A6 A5 A4 A3 A2 A1 A0 1 A START Target Address R/W ACK from Target D6 D5 D4 D3 D2 D1 D0 A D7 P STOP ACK from Controller Data from Previous Register Target controls SDA line Controller controls SDA line Figure 7-14. Repeated Read from Single Register 7.5.5 SMBus Alert Mode When the Alert Mode Setting bit in the Configuration Register is set to 0, the Interrupt/SMBus Alert mode is enabled. In this mode, the ALERT pin is asserted at the end of a conversion cycle if the measured temperature exceeds a High Alert Limit or goes below a Low Alert Limit defined in the limit registers. In this mode, the TMP4719 sets the ALERT mask bit of the Configuration Register during a read of the Status Register if any flag in the Status Register, except the ADC_Busy flag and Remote Diode Open flag, is set. This prevents the ALERT pin from triggering until the controller resets the ALERT mask bit (write 0 to the Alert_MASK bit). The ALERT High Status flags are set at the end of a conversion cycle when the measured temperature exceeds a High Alert Limit register limit. There are separate High Limit values and status register flags for the remote and local temperature measurements. The status register flags are only set to the respective temperature measurements. The ALERT Low Status flag is set at the end of a conversion cycle when the measured remote temperature is below the Remote Low Alert Limit register limit. There are separate Low Limit values and status register flags for the remote and local temperature measurements. The status register flags are only set to the respective temperature measurements. The Status Register limit flags are cleared after a read command of the Status Register from the controller and are set again at the end of a temperature conversion cycle if the measured temperature is outside the set limits. When the ALERT pin is connected to the SMBus alert line, there can be multiple devices on the same output. For the controller to resolve which target is generating an alert, the controller can send an SMBus ALERT Response Address (ARA) command. If the TMP4719 is generating an alert, and an ARA command is sent, the TMP4719 sets the ALERT MASK bit in the Configuration register and sends the target address to the controller. An ARA command does not clear any Status register flags. A read command of the Status Register from the controller is required to clear the Status Register limit flags. Figure 7-15 shows the behavior of the ALERT pin and flags while in SMBus Alert mode. www.ti.com TMP4719 SBOSAJ7 – OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TMP4719 |
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