| Electronic Components Datasheet Search |
|
TMP442 Datasheet(PDF) 7 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TMP442 Datasheet(HTML) 7 Page - Texas Instruments |
|
7 / 57 page ![]() 6.5 Electrical Characteristics (continued) Over free-air temperature range at TA = –40°C to 125°C and VDD = 1.62V to 5.5V (unless otherwise noted); Typical specifications are at TA = 25°C and VDD = 3.3V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IDD_SD Shutdown current Serial bus inactive TA = 25°C 0.5 0.8 μA TA = –40°C to 125°C 5 μA Serial bus active. fs = 400kHz 6.9 μA Serial bus active. fs = 1MHz 15.2 μA VPOR Power-on reset threshold voltage Supply rising 1.2 1.4 V Brownout detect Supply falling 1.0 1.1 V tPOR Device initialization time 15 ms (1) Repeatability is the ability to reproduce a reading when the measured temperature is applied consecutively, under the same conditions. (2) Quiescent current between conversions in continuous conversion mode 6.6 I2C Interface Timing minimum and maximum specifications are over –40°C to 125°C and VDD = 1.62V to 5.5V (unless otherwise noted)(1) STANDARD MODE FAST MODE FAST MODE PLUS UNIT MIN MAX MIN MAX MIN MAX f(SCL) SCL operating frequency(2) 1 100 1 400 1 1000 kHz t(BUF) Bus-free time between STOP and START conditions 4.7 – 1.3 – 0.5 – µs t(SUSTA) Repeated START condition setup time 4.7 – 0.6 – 0.26 – µs t(HDSTA) Hold time after repeated START condition. After this period, the first clock is generated. 4.0 – 0.6 – 0.26 – µs t(SUSTO) STOP condition setup time 4.0 – 0.6 – 0.26 – µs t(HDDAT) Data hold time(3) 0 3450 0 900 0 150 ns t(SUDAT) Data setup time 250 – 100 – 50 – ns t(LOW) SCL clock low period 4.7 – 1.3 – 0.5 – µs t(HIGH) SCL clock high period 4.0 – 0.6 – 0.26 – µs t(VDAT) Data valid time (data response time)(4) – 3.45 0.9 – 0.45 µs tR Clock and data rise time(5) – 1000 20 300 – 120 ns tF Clock and data fall time – 300 20 × (VDD / 5.5V) 300 20 × (VDD / 5.5V) 120 ns (1) The controller and target have the same I/O supply value. Values are based on statistical analysis of samples tested during initial release. (2) The TMP4719 is equipped with a 50ns spike filter on both SCL and SDA lines. The filter allows the device to be used alongside I3C devices without impacting the communication. (3) The maximum t(HDDAT) can be 3.45µs and 0.9µs for Standard Mode and Fast Mode, but must be less than the maximum of t(VDAT) by a transition time. (4) t(VDAT) = time for data signal from SCL LOW to SDA output (HIGH to LOW, depending on which is worse). (5) The TMP4719 is not sensitive to rise and fall time. www.ti.com TMP4719 SBOSAJ7 – OCTOBER 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: TMP4719 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |