TMP411CD datasheet(27/61 Pages) TI2

27 / 61 page

Frame 1 Two Wire Device Address Byte

Frame 2 Pointer Register Byte

Host

Device

SCL

Start By

ACK By

SDA

(1)

Frame 3 Two Wire Device Address Byte

Frame 4 Data Byte 1 Read Register

Host

Device

Host

SCL

Start By

ACK By

SDA

(1)

(Continued)

From

Device

SDA

(Continued)

SCL

(Continued)

Stop By

Host

NACK By

Host

From

Device

Frame 5 Data Byte 2 Read Register

(2)

Target address 1001100 (TMP411A/TMP411DA) is shown. Target address changes for TMP411B/TMP411DB and TMP411C/

TMP411DC. See Ordering Information table for more details.

Host must leave SDA high to terminate a two−byte read operation.

Figure 7-6. Two-Wire Timing Diagram for Two-Byte Read Format

Start By

Host

ACK By

Device

From

Device

NACK By

Host

Stop By

Host

SDA

SCL

ALERT

R/W

Status

Frame 2 Device Address Byte

Frame 1 SMBus ALERT Response Address Byte

(1)

Target address 1001100 (TMP411A/TMP411DA) is shown. Target address changes for TMP411B/TMP411DB and TMP411C/

TMP411DC. See Ordering Information table for more details.

Figure 7-7. Timing Diagram for SMBus Alert

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TMP411, TMP411D

SBOS383E – DECEMBER 2006 – REVISED JULY 2025

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TMP411CD Datasheet(PDF) 27 Page - Texas Instruments

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