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TMP411CD Datasheet(PDF) 28 Page - Texas Instruments

Part # TMP411CD
Description  TMP411 ±1°C and TMP411D ±0.8°C Remote and Local Temperature Sensor With N-Factor and Series Resistance Correction
PDF  61 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TMP411CD Datasheet(HTML) 28 Page - Texas Instruments

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Measured
Temperature
THERM Limit and ALERT High Limit
ALERT Low Limit and THERM Limit Hysteresis
THERM
ALERT
SMBus ALERT
Read
Read
Time
Read
Figure 7-8. SMBus Alert Timing Diagram
7.5.4 Serial Bus Address
To communicate with the TMP411/TMP411D, the controller must first address target devices through a target
address byte. The target address byte consists of seven address bits and a direction bit that indicates whether
the operation is read or write. The address of the TMP411A/TMP411DA is 4Ch (1001100b). The address of the
TMP411B/TMP411DB is 4Dh (1001101b). The address of the TMP411E/TMP411DE is 4Ch (1001100b).
Table 7-5. TMP411/TMP411D Device Address Options
DEVICE NAME
PART NUMBER
I2C BINARY ADDRESS
I2C HEX ADDRESS
OFFSET REGISTERS
TMP411
(DGK and D packages)
TMP411ADGKR
TMP411ADR
100 1100b
4Ch
No
TMP411BDGKR
TMP411BDR
100 1101b
4Dh
No
TMP411CDGKR
TMP411CDR
100 1110b
4Eh
No
TMP411EDGKR
100 1100b
4Ch
Yes
TMP411D
(DDF package)
TMP411DADDFR
100 1100b
4Ch
No
TMP411DBDDFR
100 1101b
4Dh
No
TMP411DCDDFR
100 1110b
4Eh
No
TMP411DEDDFR
100 1100b
4Ch
Yes
7.5.5 Read and Write Operations
To access a particular register on the TMP411/TMP411D, the appropriate value must be written to the Pointer
Register. With the read and write bit low, the value for the Pointer Register is the first byte transferred after the
target address byte. Every write operation to the TMP411/TMP411D requires a value for the Pointer Register, as
shown in Figure 7-4.
When reading from the TMP411/TMP411D, the last value stored in the Pointer Register by a write operation
determines which register is read by a read operation. A new value must be written to the Pointer Register to
change the register pointer for a read operation. This transaction is accomplished by issuing a target address
byte with the read and write bit low, followed by the Pointer Register byte. No additional data is required. The
controller then generates a START condition and sends the target address byte with the read and write bit
high to initiate the read command. See Figure 7-5 for details of this sequence. Continually sending the Pointer
Register bytes is not necessary if repeated reads from the same register are desired, because the TMP411/
TMP411D device retains the Pointer Register value until the next write operation changes the value. Note that
the MSB sends the register bytes first, followed by the LSB.
TMP411, TMP411D
SBOS383E – DECEMBER 2006 – REVISED JULY 2025
www.ti.com
28
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Copyright © 2025 Texas Instruments Incorporated
Product Folder Links: TMP411 TMP411D



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