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TMUX6136 Datasheet(PDF) 21 Page - Texas Instruments |
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TMUX6136 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 31 page ![]() 7.2.1 Design Requirements The goal of this design example is to simplify the FVMC and FCMV functions of a PMU design using a SPDT switch. The FVMC configuration is useful to test a device being used as a power supply, or in continuity or leakage testing. In this configuration, the input voltage is directly applied to the DUT pin, and the current into or out of the DUT pin is converted to a voltage by a sense resistor and measured by an analog to digital converter (ADC). In the FCMV mode, an input current is forced to the DUT and the produced voltage on the DUT pin is directly measured. In this example, the PMU design is required to meet the following specifications: • Force voltage range: –15volts to +15volts • Force current range: ±5µA to ±50mA • Measure voltage range: –15volts to +15volts • Measure current range: ±5µA to ±50mA In addition to the voltage and current requirements, fast throughput is also a key requirement in ATE because it relates directly to the cost of manufacturing the DUT. 7.2.2 Detailed Design Procedure DAC + ± + ± ADC + ± Force Amplifier RSENSE TMUX6136 DUT B B A A Current Sense Amplifier Voltage Sense Amplifier Av Figure 7-3. FVMC Implementation in PMU Using the TMUX6136 DAC + ± + ± ADC + ± Force Amplifier RSENSE TMUX6136 DUT B B A A Current Sense Amplifier Voltage Sense Amplifier Av Figure 7-4. FCMV Implementation in PMU Using the TMUX6136 The implementation of the FVMC and FCMV modes can be combined with the use of a dual SPDT switch such as the TMUX6136. Figure 7-3 and Figure 7-4 shows simplified diagrams of such implementations. In the FVMC mode, the switch is toggled to position A and this allows the voltage sense amplifier to become part of the feedback loop and the voltage output of the current sense amplifier to be sampled by the ADC. In the FCMV mode, the switch is toggled to position B, and this allows the current sense amplifier to become part of the feedback loop and the voltage output of the voltage sense amplifier to be sampled by the ADC. www.ti.com TMUX6136 SCDS397B – NOVEMBER 2018 – REVISED AUGUST 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: TMUX6136 |
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