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TDA2SA Datasheet(PDF) 268 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 268 Page - Texas Instruments |
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268 / 427 page  268 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF SPRS951F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Timing Requirements and Switching Characteristics Copyright © 2015–2019, Texas Instruments Incorporated Table 7-48. Switching Characteristics Over Recommended Operating Conditions for McASP1 (1) (continued) NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT 10 tw(AHCLKRX) Pulse duration, AHCLKR/X high or low 0.5P - 2.5 (2) ns 11 tc(ACLKRX) Cycle time, ACLKR/X 20 ns 12 tw(ACLKRX) Pulse duration, ACLKR/X high or low 0.5P - 2.5 (3) ns 13 td(ACLK-AFSXR) Delay time, ACLKR/X transmit edge to AFSX/R output valid ACLKR/X int -0.21 6 ns ACLKR/X ext in ACLKR/X ext out 2 23.9 ns 14 td(ACLK-AXR) Delay time, ACLKR/X transmit edge to AXR output valid ACLKR/X int -1.8 6.9 ns ACLKR/X ext in ACLKR/X ext out 2 25.6 ns (1) ACLKR internal: ACLKRCTL.CLKRM=1, PDIR.ACLKR = 1 ACLKR external input: ACLKRCTL.CLKRM=0, PDIR.ACLKR=0 ACLKR external output: ACLKRCTL.CLKRM=0, PDIR.ACLKR=1 ACLKX internal: ACLKXCTL.CLKXM=1, PDIR.ACLKX = 1 ACLKX external input: ACLKXCTL.CLKXM=0, PDIR.ACLKX=0 ACLKX external output: ACLKXCTL.CLKXM=0, PDIR.ACLKX=1 (2) P = AHCLKR/X period in ns. (3) R = ACLKR/X period in ns. Table 7-49. Switching Characteristics Over Recommended Operating Conditions for McASP2 (1) NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT 9 tc(AHCLKRX) Cycle time, AHCLKR/X 20 ns 10 tw(AHCLKRX) Pulse duration, AHCLKR/X high or low 0.5P - 2.5 (2) ns 11 tc(ACLKRX) Cycle time, ACLKR/X 20 ns 12 tw(ACLKRX) Pulse duration, ACLKR/X high or low 0.5P - 2.5 (3) ns 13 td(ACLK-AFSXR) Delay time, ACLKR/X transmit edge to AFSX/R output valid ACLKR/X int 0 6 ns ACLKR/X ext in ACLKR/X ext out 2 25.2 ns 14 td(ACLK-AXR) Delay time, ACLKR/X transmit edge to AXR output valid ACLKR/X int -1.29 6.11 ns ACLKR/X ext in ACLKR/X ext out 2 24.8 ns (1) ACLKR internal: ACLKRCTL.CLKRM=1, PDIR.ACLKR = 1 ACLKR external input: ACLKRCTL.CLKRM=0, PDIR.ACLKR=0 ACLKR external output: ACLKRCTL.CLKRM=0, PDIR.ACLKR=1 ACLKX internal: ACLKXCTL.CLKXM=1, PDIR.ACLKX = 1 ACLKX external input: ACLKXCTL.CLKXM=0, PDIR.ACLKX=0 ACLKX external output: ACLKXCTL.CLKXM=0, PDIR.ACLKX=1 (2) P = AHCLKR/X period in ns. (3) R = ACLKR/X period in ns. Table 7-50. Switching Characteristics Over Recommended Operating Conditions for McASP3/4/5/6/7/8 (1) NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT 9 tc(AHCLKRX) Cycle time, AHCLKR/X 20 ns 10 tw(AHCLKRX) Pulse duration, AHCLKR/X high or low 0.5P - 2.5 (2) ns 11 tc(ACLKRX) Cycle time, ACLKR/X 20 ns 12 tw(ACLKRX) Pulse duration, ACLKR/X high or low 0.5P - 2.5 (3) ns |
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