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TDA2SA Datasheet(PDF) 333 Page - Texas Instruments |
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TDA2SA Datasheet(HTML) 333 Page - Texas Instruments |
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333 / 427 page ![]() SWPS040-212 SWPS040-211 333 TDA2SX, TDA2SG, TDA2SA TDA2HG, TDA2HV, TDA2HF, TDA2LF www.ti.com SPRS951F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: TDA2SX TDA2SG TDA2SA TDA2HG TDA2HV TDA2HF TDA2LF Applications, Implementation, and Layout Copyright © 2015–2019, Texas Instruments Incorporated Figure 8-4. Poor Via Assignment for PDN Figure 8-5 shows an improved power net routing with better via assignment and placement, respectively. Figure 8-5. Improved Via Assignment for PDN • To avoid any “ampacity” issue – maximum current-carrying capacity of each transitional via should be evaluated to determine the appropriate number of vias required to connect components. Figure 8-6 and Figure 8-7 show examples of “via starvation” on a power net transitioning from top routing layer to internal layers and the improved layout, respectively. Adding vias to bring the “via-to- pad” ratio to 1:1 will improve PDN performance. |
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