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LLCC68 Datasheet(PDF) 71 Page - Semtech Corporation

Part # LLCC68
Description  Long Range, Low Power, sub-GHz RF Transceiver
PDF  111 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

LLCC68 Datasheet(HTML) 71 Page - Semtech Corporation

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LLCC68
Data Sheet
Rev. 1.1
DS.LLCC68.W.APP
Dec 2024
71 of 111
Semtech
LLCC68
www.semtech.com
13.1.7 SetRxDutyCycle
This command sets the chip in sniff mode so that it regularly looks for new packets. This is the listen mode.
When this command is sent in STDBY_RC mode, the context (device configuration) is saved and the chip enters in a loop defined by the
following steps:
• The chip enters RX and listens for a packet for a period of time defined by rxPeriod
• The chip looks for a preamble in either LoRa or FSK
• Upon preamble detection, the timeout is stopped and restarted with the value 2 * rxPeriod + sleepPeriod
• If no packet is received during the RX window (defined by rxPeriod), the chip goes into SLEEP mode with context saved for a period of
time defined by sleepPeriod
• At the end of the SLEEP window, the chip automatically restarts the process of restoring context and enters the RX mode, and so on. At
any time, the host can stop the procedure.
The loop is terminated if either:
• A packet is detected during the RX window, at which moment the chip interrupts the host via the RX_DONE flag and returns to
STBY_RC mode
• The host issues a SetStandby(...) command during the RX window (during SLEEP mode, the device is unable to receive
commands straight away and must first be waken up by a falling edge of NSS).
The SLEEP mode duration is defined by:
Sleep Duration = sleepPeriod * 15.625µs
The RX mode duration is defined by
Rx Duration = rxPeriod * 15.625µs
The following figure highlights operations being performed while in RxDutyCycle mode. It can be observed that the radio takes around 1ms
to save the context, go into SLEEP mode, re-initialize the radio, lock the PLL and go into RX. The delay is not accurate and may vary depending
on the time needed for the XTAL to start, the PLL to lock, etc.
Table 13-12: SetRxDutyCycle SPI Transaction
Byte
0
1-3
4-6
Data from host
Opcode = 0x94
rxPeriod(23:0)
sleepPeriod(23:0)



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