LLCC68 datasheet(81/111 Pages) SEMTECH

81 / 111 page

LLCC68

Data Sheet

Rev. 1.1

DS.LLCC68.W.APP

Dec 2024

81 of 111

Semtech

LLCC68

www.semtech.com

13.3.6 SetDIO3AsTCXOCtrl

This command configures the chip for an external TCXO reference voltage controlled by DIO3.

When this command is used, the device now controls the TCXO itself through DIO3. When needed (in mode STDBY_XOSC, FS, TX and RX),

the internal state machine is set DIO3 to a predefined output voltage (control through the parameter tcxoVoltage). Internally, the clock

controller waits for the 32MHz to appear before releasing the internal state machine.

The time needed for the 32MHz to appear and stabilize can be controlled through the parameter delay(23:0). If the 32MHz from the TCXO

is not detected internally at the end the delay period, the error XOSC_START_ERR is flagged in the error controller.

The XOSC_START_ERR flag is raised at POR or at wake-up from Sleep mode in a cold-start condition, when a TCXO is used. It is an expected

behaviour since the chip is not yet aware of being clocked by a TCXO. The user should simply clear this flag with the ClearDeviceErrors

command.

The tcxoVoltage byte definition is given in as follows:

tcxoVoltage precision varies with the tcxoVoltage setting value. It is typically +/-50mV for 1.8V setting.

The power regulation for tcxoVoltage is configured to be 200mV below the supply voltage. This means that even if tcxoVoltage is configured

above the supply voltage, the supply voltage is limited by:

VDDop > VTCXO + 200mV

The timeout duration is defined by:

Delay duration = Delay(23:0) *15.625µs

Most TCXO is not be immediately ready at the desired frequency and suffers from an initial setup time where the frequency is gently drifting

towards the wanted frequency. This setup time varies from one TCXO to another and is also dependent on the TCXO manufacturer. To

ensure this setup time does not have any effect on the modulation or packets, the delay value internally gates the 32MHz coming from the

TCXO to give enough time for this initial drift to stabilize. At the end of the delay period, the internal block stops gating the clock and the

radio carries on to the next step.

Note: The user should take the delay period into account when going into Tx or Rx mode from STDBY_RC mode, since the time

needed to switch modes increases with the duration of delay. To avoid increasing the switching mode time, the user can first set the

device in STDBY_XOSC which switches on the TCXO and wait for the delay period. Then, the user can set the device into Tx or Rx

mode without suffering from any delay additional to the internal processing.

Table 13-34: SetDIO3asTCXOCtrl SPI Transaction

Byte

2-4

Data from host

Opcode = 0x97

tcxoVoltage

delay(23:0)

Table 13-35: tcxoVoltage Configuration Definition

tcxoVoltage

Description

0x00

DIO3 outputs 1.6V to supply the TCXO

0x01

DIO3 outputs 1.7V to supply the TCXO

0x02

DIO3 outputs 1.8V to supply the TCXO

0x03

DIO3 outputs 2.2V to supply the TCXO

0x04

DIO3 outputs 2.4V to supply the TCXO

0x05

DIO3 outputs 2.7V to supply the TCXO

0x06

DIO3 outputs 3.0V to supply the TCXO

0x07

DIO3 outputs 3.3V to supply the TCXO

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