8.2.1.1 Design Requirements

The design requirements for the application driving the ADS127Lx1 ADC are listed in Table 8-1.

Table 8-1. Design Parameters

PARAMETER

VALUE

Differential-to-differential conversion

VIN to VOUT

Supply voltages

VS± = ±15V, VLVDD = 5V, VLVSS = GND, VREF = 4.096V

Full-scale range of ADC

FSR = ± 4.096V

Data rate of ADC

fDATA = 187.5kSPS

ADC filter configuration

(1) High-speed mode, Sinc4 filter, OSR = 64

(2) High-speed mode, Wideband filter, OSR = 64

Signal frequency

Tested at fIN = 1kHz

RC kickback filter(1)

RFIL = 47.4Ω, CDIFF = 470pF, CCM = 47pF

(1)

Consider a trade-off between THD, frequency response, and drift. The differential current drift

into the ADC can interact with the filter resistors and result in higher drift errors. However, lower

resistance degrades the phase margin of the PGA854. For low drift applications, keep RFIL < 50Ω.

8.2.1.2 Detailed Design Procedure

Table 8-2 and Table 8-3 show the typical signal-to-noise (SNR) and total harmonic distortion (THD) of the

PGA854 driving the ADS127Lx1 delta-sigma ADC using a sinc4 or wideband filter. A 1kHz differential signal

is applied to the input. The signal amplitude is adjusted to produce a PGA854 output at –0.2dBFS of the

ADC full-scale range. For a list of the equivalent input voltage amplitude signals for the different PGA854 gain

configurations, see Table 8-2 and Table 8-3. At gain = 1V/V, the design achieves –94dB THD and 80.2dB SNR

for Sinc4 filter.

Table 8-2. PGA854 and ADS127Lx1 FFT Data Summary, OSR = 64, Sinc4 Filter

PGA GAIN (V/V)

INPUT AMPLITUDE (VPP)

SNR (dB)

THD (dB)

ENOB (Bits)

0.5

16.6

107.28

-110.4

17.24

1

8.28

106.42

-109.17

17.08

2

4.14

106.79

-109.93

17.16

5

1.66

103.48

-108.83

16.71

10

0.83

99.03

-108.35

16.08

20

0.41

92.75

-106.19

15.08

50

0.17

86.32

-101.12

14.02

100

0.08

80.21

-94.02

13

Table 8-3. PGA854 and ADS127Lx1 FFT Data Summary, OSR = 64, Wideband Filter

PGA GAIN (V/V)

INPUT AMPLITUDE (VPP)

SNR (dB)

THD (dB)

ENOB (Bits)

0.5

16.6

105.36

-110.12

17.00

1

8.28

105.22

-109.12

16.94

2

4.14

105.45

-109.96

17.01

5

1.66

102.83

-108.62

16.62

10

0.83

98.7

-108.64

16.03

20

0.41

93.15

-104.83

15.13

50

0.17

85.67

-99.43

13.91

100

0.08

79.8

-93.67

12.93

The R-C-R differential low-pass filter at the input of the instrumentation amplifier helps reduce EMI/RFI high-

frequency extrinsic noise. This filter is customizable per the bandwidth and application requirements. This

design example (see Figure 8-9) suggests a filter with the capacitor ratio of CIN_DIFF = 10 × CIN_CM. Using

PGA854

SBOSAN2A – AUGUST 2025 – REVISED DECEMBER 2025

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