6.5 Electrical Characteristics (continued)

at TA = 25°C, VS = VSOUT = ±15V, VICM = VOCM at mid-supply, RL = 10kΩ, and G = 1V/V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

FREQUENCY RESPONSE

BW

Bandwidth, –3dB

G < 10

6.2

MHz

G = 10, 20

5.0

G = 50, 100

2.4

SR

Slew rate

G = 0.5, VOUT = 8V

G = 1 to 100, VOUT = 10V

45

V/µs

tS

Settling time

G = 0.5, VIN = 10V step or

G= 1 to 20, VOUT = 10V step

To 0.01%

0.75

µs

To 0.0015%

0.9

µs

G = 50

VOUT = 10V step

To 0.01%

1.3

µs

To 0.0015%

1.4

µs

G = 100

VOUT = 10V step

To 0.01%

2

µs

To 0.0015%

2.3

µs

Gain switching time

1.5

µs

THD+N

Total harmonic distortion and Noise

Differential input, f = 10kHz, VOUT = 10VPP

–99

dB

Single-ended input, f = 10kHz, VOUT = 10VPP

–93

HD2

Second-order harmonic distortion

Differential input, f = 10kHz, VOUT = 10VPP

–121

dB

Single-ended input, f = 10kHz, VOUT = 10VPP

–112

HD3

Third-order harmonic distortion

Differential input, f = 10kHz, VOUT = 10VPP

–105

dB

Single-ended input, f = 10kHz, VOUT = 10VPP

–104

OUTPUT COMMON-MODE VOLTAGE (VOCM) CONTROL

VOCM

Output common-mode control

voltage(3)

VS = ±4.5V

VLVSS + 1.5

VLVDD – 1.5

V

VS = ±18V

VLVSS + 2

VLVDD – 2

Small-signal bandwidth VOCM pin

VOCM = 100mVPP

14

MHz

Large-signal bandwidth VOCM pin

VOCM = 0.6VPP

14

MHz

DC output balance(4)

VOCM fixed at mid-supply (VOUT = ±1V)

95

dB

Input impedance VOCM pin

250 || 1

kΩ || pF

VOUTCM offset from mid-supply

VOCM pin floating

±1

±4.5

mV

VOUTCM offset voltage(5)

VOCM = VICM, VOUT = 0V

±1

±4.5

mV

VOUTCM offset voltage drift

VOCM = VICM, VOUT = 0V, TA = –40°C to +125°C

±20

±40

µV/°C

INPUT STAGE POWER SUPPLY

IQ_input

Input stage quiescent current

VS+, VS–

VIN = 0V, VICM = 0V

3.2

3.9

mA

TA = –40°C to +125°C

4.9

OUTPUT STAGE POWER SUPPLY

IQ_output

Output stage quiescent current

LVDD, LVSS

VIN = 0V, VOCM fixed at mid-

supply

2.3

2.8

mA

TA = –40°C to +125°C

3.5

DIGITAL LOGIC

VIL

Digital input logic low

A0, A1, A2 pins, referred to DGND

VDGND

VDGND + 0.8

V

VIH

Digital input logic high

A0, A1, A2 pins, referred to DGND

VDGND + 1.8

VS+

V

Digital input pin current

A0, A1, A2 pins

1.5

3

µA

VDGND

DGND voltage

VS–

(VS+) – 4

V

DGND reference current

4

10

µA

(1)

Differential Input voltage of the PGA854 amplifier (VIN = VIN+ – VIN–). The valid input range depends on input common-mode voltage

VICM, gain G, and output common-mode voltage VOCM. See Section 8.1.1.

(2)

Differential output voltage VOUT = VOUT+ - VOUT– See Section 8.1.1 for valid linear operating range of the amplifier.

(3)

VOCM is the Voltage on VOCM pin. Actual output common-mode voltage is calculated from single-ended output voltages VOUTCM =

(VOUT+ + VOUT–) / 2.

(4)

DC output balance is defined as |VOUTCM(at VIN = +1) – VOUTCM(at VIN = –1)| / 2.

(5)

VOUTCM offset voltage is defined as VOUTCM – VOCM.

PGA854

SBOSAN2A – AUGUST 2025 – REVISED DECEMBER 2025

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