MP8007 ― IEEE 802.3AF PD WITH 13W FLYBACK / BUCK CONVERTER

MP8007 Rev.1.0

www.MonolithicPower.com

18

6/27/2016

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Output Voltage Control

In flyback application, the DCDC converter

detects the auxiliary winding voltage from FB1

during the secondary-side diode conduction

period.

Assume the secondary winding is the master,

and the auxiliary winding is the slave. When the

secondary-side

diode

conducts,

the

FB1

voltage is calculated with Equation (7):

A2

FB1

OUT

D1F

S1

2

NR

V(V

V )

NR

R









(7)

Where:

VD1F is the output diode forward-drop voltage.

VOUT is the output voltage.

NA and NS are the turns of the auxiliary winding

and the secondary-side winding, respectively.

R1 and R2 are the resistor dividers for sampling.

The output voltage differs from the secondary-

winding voltage due to the current-dependant

diode forward voltage drop. If the secondary-

winding voltage is always detected at a fixed

secondary current, the difference between the

output voltage and the secondary-winding

voltage is a fixed VD1F. DCDC converter starts

sampling the auxiliary-winding voltage after the

internal power MOSFET turns off for 0.7 μs and

finishes the sampling after the secondary-side

diode conducts for 3μs. This provides good

regulation when the load changes. However,

the secondary diode conducting period must be

longer than 3μs in each cycle, and the FB1

signal must be smooth in 0.7μs after the switch

turns off.

With a buck solution, there is one FB2 pin

referred to VDD. It can be used as the

reference voltage for the buck application. The

output voltage is referred to VDD and does not

have the same GND as the input power.

Programming the Switching Current Limit

The switching converter current limit is set by

an external resistor (R3 in schematic on page 1)

from ILIM to ground. The value of R3 can be

estimated with Equation (8):

L

LIM

V0.18

100

I

R3

L





(8)

Where ILIM is the current limit in A, VL is the

voltage applied on the inductor when the

MOSFET turns on, R3 is the setting resistor in

kΩ, and L is the inductor in μH.

The current limit cannot be programmed higher

than 3A.

If Input voltage is very low, the inductor current

may increase slowly, it will take a long time to

meet

the

setting

current

limit.

MP8007

integrates a ~7us max on time. After the max

on time, MOSFET will turn off, even the

inductor current doesn`t meet the setting

current limit.

Converter Leading-Edge Blanking

Transformer parasitic capacitance induces a

current spike on the switching power FET when

the power switch turns on. The DCDC converter

includes a 450 ns leading-edge blanking period

to avoid falsely terminating the switching pulse.

During this blanking period, the current sense

comparator is disabled, and the gate driver

cannot switch off.

DCDC Converter DCM Detection

The DCDC switching regulator operates in

discontinuous conduction mode in both flyback

and buck modes.

In flyback mode, the DCDC converter detects

the falling edge of the FB1 voltage in each cycle.

The second cycle switching will not start unless

the chip detects a 50 mV falling edge on FB1.

In buck mode, the DCDC converter detects the

falling edge of the SW voltage in each cycle.

The second cycle switching will not start unless

the chip detects 0.14 V falling edge between

VSW-VDD.

Over-Voltage & Open-Circuit Protection

In flyback mode, the DCDC converter includes

over-voltage protection (OVP) and open-circuit

protection. If the voltage at FB1 exceeds 125

percent of VREF1, or FB1’s -60 mV falling edge

cannot be detected because the feedback

resistor is removed, immediately the DCDC

converter shuts off the driving signal and enters

hiccup mode by re-charging the internal

capacitor. The DCDC converter resumes

normal operation when the fault is removed.