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MP8007 Datasheet(PDF) 20 Page - Monolithic Power Systems

Part # MP8007
Description  Fully-Integrated 802.3af-Compatible PoE PD Interface with 13W Primary-side Regulated Flyback or Buck Converter
PDF  27 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP8007 Datasheet(HTML) 20 Page - Monolithic Power Systems

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MP8007 ― IEEE 802.3AF PD WITH 13W FLYBACK / BUCK CONVERTER
MP8007 Rev.1.0
www.MonolithicPower.com
20
6/27/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
APPLICATION INFORMATION
Detection Resistor
In the Detection Mode, a resistor connected
between DET and VDD pin is needed as a load
to the PSE. The resistance is calculated as a
ΔV/ΔI, with an acceptable range of 23.7kΩ to
26.3kΩ. Use a typical value of 24.9kΩ as
detection resistor.
Classification Resistor
In order to distribute power to as many loads as
possible from PSE, a resistor between CLASS
and VSS pins is used to classify the PD power
level, which draws a fixed current set by
classification resistor. The power supplied to
PD set by classification resistor is shown in
Table 1. Typical voltage on CLASS pin is 1.16V
in classification range, and it produces about
33mW power loss on class resistor in Class 3
condition.
Protection TVS
To limit input transient voltage within the
absolute maximum rating, a TVS across the
rectified voltage (VDD-VSS) must be used. A
SMAJ58A, or equivalent, is recommended for
general indoor applications. Outdoor transient
levels or special applications require additional
protection.
PD Input Capacitor
An input bypass capacitor (from VDD to VSS)
of 0.05μF to 0.12μF is needed for IEEE
802.3af/at standard specification. Typically a
0.1μF, 100V ceramic capacitor is used.
Wall Power Adaptor Detection Circuit
When an auxiliary power source such as a wall
power adapter is used to power the device, the
divider resistors RADPUP, RADPDOWN and DADP3
must be chosen as shown in figure 7 to satisfy
the Equation (1) for correct wall power adaptor
detection.
RADPUP with typical 3kΩ value is suggested to
balance the power loss and DADP1&DADP2
leakage current discharge.
VDD
AUX
VSS
RTN
VADP
Adaptor GND
RADPUP
R ADPDOWN
DADP1
DADP2
DADP3
PG
Figure 7: Wall Adaptor Detection Circuit
To prevent the converter from operating at an
excessively low adapter voltage, choose a
startup voltage, VSTART approximately 80% of
nominal. Assuming that the adapter voltage is
48V, Let RADPUP=3kΩ, RADPDOWN=8.06kΩ and
DADP3=30V as Equation (1). Re-check the
adapter turn-on and turn-off voltage:
ADPUP
ADPDOWN
ADP ON
ADPUP
RR
V30 2.3
38.5V
R

(9)
ADPUP
ADPDOWN
ADP OFF
ADPUP
RR
V
30 0.6
32.2V
R

(10)
The VDD-AUX voltage differential voltage is
4.88V when adapter input is 48V. If much
higher adapter voltage is applied and divided
voltage on AUX pin is higher than 6.5V,
RADPDOWN and DADP3 must be able to limit the
current from AUX to adapter-GND less than
3mA, or else additional resistor from tap of
resistor divider to AUX pin is needed to limit the
current.
One small package Schottky diode with 100V
voltage rating (such as BAT46W) is usually
suggested for DADP1. The voltage rating of DADP2
must also be 100V or higher while current rating
must be higher than load current. Low voltage
drop Schottky diode (such as SS1H10) is
recommended to reduce conduction power-loss.
Power Good (PG) Indicator Signal
MP8007 integrates one PG indicator. PG pin is
used to indicate the PD inrush period finishes
and enable the DCDC converter internally. The
PG pin is an active-high output with internal
driven, consequently it can be floated to enable
DCDC converter. Pull PG pin low externally can
disable the DCDC regulator of MP8007.



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