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TAS5822M Datasheet(PDF) 66 Page - Texas Instruments |
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TAS5822M Datasheet(HTML) 66 Page - Texas Instruments |
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66 / 106 page  7.1.26 ADR_SEL Register (Offset = 61h) [Reset = 00h] ADR_SEL is shown in Figure 7-26 and described in Table 7-28. Return to the Summary Table. ADR output selection Figure 7-26. ADR_SEL Register 7 6 5 4 3 2 1 0 RESERVED ADR_SEL R/W-0h R/W-0h Table 7-28. ADR_SEL Register Field Descriptions Bit Field Type Reset Description 7-5 RESERVED R/W 0h 4-0 ADR_SEL R/W 0h b'00000: off (low) b'00011: Auto mute flag (asserted when both L and R channels are auto muted) b'00100: Auto mute flag for left channel b'00101: Auto mute flag for right channel b'00110: Clock invalid flag (clock error or clock missing) b'00111: PLL lock flag b'01000: Warning b'01001: Serial audio interface data output (SDOUT) b'01011: ADR as FAULTZ output Others: reserved TAS5802 SLASFB7A – NOVEMBER 2024 – REVISED AUGUST 2025 www.ti.com 66 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TAS5802 |
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