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IMXRT1160AXEC Datasheet(PDF) 61 Page - NXP Semiconductors

Part # IMXRT1160AXEC
Description  i.MX RT1160 Crossover Processors Data Sheet for Extended Industrial Products
PDF  130 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

IMXRT1160AXEC Datasheet(HTML) 61 Page - NXP Semiconductors

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Electrical characteristics
i.MX RT1160 Crossover Processors Data Sheet for Extended Industrial Products, Rev. 4, 06/2025
NXP Semiconductors
61
4.5
External memory interface
The following sections provide information about external memory interfaces.
4.5.1
SEMC specifications
The following sections provide information on SEMC interface.
Measurements are with a load of 15 pf and an input slew rate of 1 V/ns.
4.5.1.1
SEMC output timing
There are ASYNC and SYNC modes for SEMC output timing.
4.5.1.1.1
SEMC output timing in ASYNC mode
Table 47 shows SEMC output timing in ASYNC mode.
T3
TRACE data setup time
2
—
ns
T4
TRACE data hold time
0.7
—
ns
Table 47. SEMC output timing in ASYNC mode
Symbol
Parameter
Min.
Max.
Unit
Comment
Frequency of operation
—
200
MHz
TCK
Internal clock period
5
—
ns
TAVO
Address output valid time
—
2
ns
These timing parameters
apply to Address and ADV#
for NOR/PSRAM in ASYNC
mode.
TAHO
Address output hold time
(TCK - 2) 1
1 Address output hold time is configurable by SEMC_*CR0.AH. AH field setting value is 0x0 in above table. When AH is set
with value N, TAHO min time should be ((N + 1) x TCK). See the i.MX RT1160 Reference Manual (IMXRT1160RM) for more
detail about SEMC_*CR0.AH register field.
—
ns
TADVL
Active low time
(TCK - 1) 2
2 ADV# low time is configurable by SEMC_*CR0.AS. AS field setting value is 0x0 in above table. When AS is set with value N,
TADL min time should be ((N + 1) x TCK - 1). See the i.MX RT1160 Reference Manual (IMXRT1160RM) for more detail about
SEMC_*CR0.AS register field.
TDVO
Data output valid time
—
2
ns
These timing parameters
apply to Data/CLE/ALE and
WE# for NAND, apply to
Data/DM/CRE for
NOR/PSRAM, apply to
Data/DCX and WRX for DBI
interface.
TDHO
Data output hold time
(TCK - 2) 3
3 Data output hold time is configurable by SEMC_*CR0.WEH. WEH field setting value is 0x0 in above table. When WEH is set
with value N, TDHO min time should be ((N + 1) x TCK). See the i.MX RT1160 Reference Manual (IMXRT1160RM) for more
detail about SEMC_*CR0.WEH register field.
—
ns
TWEL
WE# low time
(TCK - 1) 4
ns
Table 46. Trace timing parameters (continued)
Symbol
Description
Min
Max
Unit



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