LT5524 datasheet(7/16 Pages) AD

7 / 16 page

LT5524

5524f

PI FU CTIO S

EN (Pin 1): Enable Pin for Amplifier. When the input

voltage is higher than 3V, the amplifier is turned on. When

the input voltage is less than or equal to 0.6V, the amplifier

is turned off. This pin is internally pulled to ground if not

connected.

VCC1(Pin2):PowerSupply.Thispinisinternallyconnected

to VCC2 (Pin 19). Decoupling capacitors (1000pF and 0.1µF

for example) may be required in some applications.

GND (Pins 3, 4, 7, 8, 13, 14, 17, 18): Ground.

IN+ (Pin 5): Positive Signal Input Pin with Internal DC

Bias.

IN– (Pin 6): Negative Signal Input Pin with Internal DC

Bias.

PGA0 (Pin 9): Amplifier PGA Control Input Pin for the 1.5dB

Attenuation Step (see Programmable Gain table). Input is

high when the input voltage is greater than 3V. Input is low

when the input voltage is less than or equal to 0.6V. This

pin is internally pulled to ground if not connected.

PGA1 (Pin 10): Amplifier PGA Control Input Pin for the 3dB

Attenuation Step (see Programmable Gain table). Input is

high when the input voltage is greater than 3V. Input is low

when the input voltage is less than or equal to 0.6V. This

pin is internally pulled to ground if not connected.

PGA2 (Pin 11): Amplifier PGA Control Input Pin for the 6dB

Attenuation Step (see Programmable Gain table). Input is

high when the input voltage is greater than 3V. Input is low

when the input voltage is less than or equal to 0.6V. This

pin is internally pulled to ground if not connected.

PGA3 (Pin 12): Amplifier PGA Control Input Pin for 12dB

Attenuation Step (see Programmable Gain table). Input is

high when the input voltage is greater than 3V. Input is low

when the input voltage is less than or equal to 0.6V. This

pin is internally pulled to ground if not connected.

OUT+ (Pin 15): Positive Amplifier Output. A transformer

with center tap tied to VCC or a choke inductor is recom-

mended to source the DC quiescent current.

OUT– (Pin 16): Negative Amplifier Output. A transformer

with center tap tied to VCC or a choke inductor is recom-

mended to source the DC quiescent current.

VCC2 (Pin 19): Power Supply. This pin is internally con-

nected to VCC1 (Pin 2).

NC (Pin 20): Not Connected.

Exposed Pad (Pin 21): Ground. This pin must be soldered

to the printed circuit board ground plane for good heat

transfer.

BLOCK DIAGRA

AMPLIFIER

OUT+

OUT–

ENABLE

CONTROL

5524 F01

GAIN CONTROL

LOGIC

ATTENUATOR

LT5524

PGA0

PGA1

PGA2

PGA3

VOLTAGE REGULATOR

AND BIAS

VCC2

VCC1

IN+

IN–

GND (3, 4, 7, 8

13, 14, 17, 18)

RIN

100Ω

Figure 1. Functional Block Diagram

LT5524 Datasheet(PDF) 7 Page - Analog Devices

LT5524 Datasheet(HTML) 7 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Datasheet Download

Link URL