GD32H757ZMT7 datasheet(103/151 Pages) GIGADEVICE

103 / 151 page

GD32H757xx Datasheet

102

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDD

VCO freq = 100 MHz

—

0.3

—

JitterPLL(2)

Cycle to cycle Jitter(rms)

fPLL_OUT =

fVCO_OUT/10

fVCO_OUT = 100

MHz

—

100

—

fVCO_OUT = 400

MHz

—

fVCO_OUT = 800

MHz

—

Period jitter(rms)

fVCO_OUT = 100

MHz

—

fVCO_OUT = 400

MHz

—

fVCO_OUT = 800

MHz

—

(1)

Value guaranteed by design, not 100% tested in production.

(2)

Value guaranteed by characterization, not 100% tested in production.

Table 4-24. PLL0/1/2 characteristics (narrow VCO frequency range)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fPLLIN(1)

PLL input clock frequency

—

MHz

PLL input clock duty cycle

—

fVCO(1)

PLL VCO output clock

frequency

—

100

—

500

MHz

tLOCK(2)

PLL lock time

—

200

500

μs

IPLL(2)

Current consumption on

VDD

VCO freq = 500 MHz

—

1.2

—

JitterPLL(2)

Cycle to cycle Jitter(rms)

fPLL_OUT =

fVCO_OUT/10

fVCO_OUT = 500

MHz

—

±ps

fVCO_OUT = 500

MHz

—

(1)

Value guaranteed by design, not 100% tested in production.

(2)

Value guaranteed by characterization, not 100% tested in production

GD32H757ZMT7 Datasheet(PDF) 103 Page - GigaDevice Semiconductor (Beijing) Inc.

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