ADPL21610ECPZ datasheet(6/15 Pages) AD

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Operation

The ADPL21610 uses a constant-frequency, current-

mode control scheme to provide excellent line and

load regulation. See the Block Diagram for more

details. At the start of each oscillator cycle, the SR

latch is set, which turns on the power switch Q1. A

voltage proportional to the switch current is added

to a stabilizing ramp, and the resulting sum is fed

into the positive terminal of the PWM comparator

A2. When this voltage exceeds the level at the nega-

tive input of A2, the SR latch is reset, turning off the

power switch. The level at the negative input of A2 is

set by the error amplifier A1, and is simply an ampli-

fied version of the difference between the feedback

voltage and the reference voltage of 1.255V. In this

manner, the error amplifier sets the correct peak cur-

rent level to keep the output in regulation. If the error

amplifier’s output increases, more current is delivered

to the output. Similarly, if the error decreases, less

current is delivered. The soft-start feature of the

ADPL21610 enables clean start-up conditions by limit-

ing the rate of voltage rise at the output of comparator

A1, which, in turn, limits the peak switch current. The

soft-start pin is connected to a reference voltage of

1.255V through a 250kΩ resistor, providing 4µA of

current to charge the soft-start capacitor. Typical

values for the soft-start capacitor range from 10nF

to 200nF. The ADPL21610 has a current limit circuit

not shown in the Block Diagram. The switch current

is constantly monitored and not allowed to exceed

the maximum switch current (typically 1.4A). If the

switch current reaches this value, the SR latch is reset

regardless of the state of comparator A2. This current

limit protects both the power switch and the external

components connected to the ADPL21610.

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Analog Devices │ 6

ADPL21610

1.1A Step-Up DC/DC

Converter with Integrated Soft-Start

Block Diagram

–

0.01Ω

DRIVER

COMPARATOR

SHDN

VIN

–

RAMP

GENERATOR

1.255V

REFERENCE

1.3MHz

OSCILLATOR

GND

R1 (EXTERNAL)

R2 (EXTERNAL)

VOUT

SHUTDOWN

250kΩ

Figure 10. Block Diagram

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