6300ESB datasheet(32/848 Pages) INTEL

32 / 848 page

Intel® 6300ESB ICH—Contents

Intel® 6300ESB I/O Controller Hub

November 2007

Order Number: 300641-004US

54 Ultra ATA Mode (Pausing a DMA Burst)...................................................................... 819

55 Ultra ATA Mode (Terminating a DMA Burst) ................................................................ 820

56 USB Rise and Fall Times .......................................................................................... 820

57 USB Jitter.............................................................................................................. 821

58 USB EOP Width ...................................................................................................... 821

59 SMBus Transaction ................................................................................................. 821

60 SMBus Timeout ...................................................................................................... 822

61 Power Sequencing and Reset Signal Timings .............................................................. 822

62 G3 (Mechanical Off) to S0 Timings ............................................................................ 823

63 S0 to S1 to S0 Timing ............................................................................................. 823

64 S0 to S5 to S0 Timings............................................................................................ 824

65 AC’97 Data Input and Output Timings ....................................................................... 824

66 Test Mode Entry (XOR Chain Example) ...................................................................... 826

67 Example XOR Chain Circuitry ................................................................................... 826

6300ESB Datasheet(PDF) 32 Page - Intel Corporation