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PCF85263ATL/A Datasheet(PDF) 56 Page - NXP Semiconductors |
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PCF85263ATL/A Datasheet(HTML) 56 Page - NXP Semiconductors |
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56 / 92 page ![]() NXP Semiconductors PCF85263A Tiny Real-Time Clock/calendar with alarm function, battery switch-over, time stamp input, and I2C-bus 7.15.3 CTS: clear timestamp The timestamp registers (address 11h to 22h) can be set to all 0 with this instruction. 7.16 Stop_enable register Bit Symbol Value Description - 0000 000 not used STOP bit 0 [1] RTC clock runs 7 to 1 0 STOP 1 RTC clock is stopped Table 62. Stop_enable - control of STOP bit (address 2Eh) [1] Default value. The STOP bit stops the time from counting in both RTC mode and stop-watch mode. For RTC mode STOP is useful to set the time accurately. For stop-watch mode it is the start/ stop control for the watch. The counter can also be controlled from the TS pin by configuring STOPM in the Function register (Section 7.13). The internal stop signal is a combination of STOP and the TS pin state. STOP bit TS pin [1] [2] stop signal Counter 1 - 1 stopped - 1 1 stopped 0 0 0 running Table 63. Counter stop signal [1] Requires STOPM and TSPM[1:0] to be configured. [2] TSL = 0 (active HIGH) (Pin_IO register, address 27h). aaa-010477 OSCILLATOR OSCILLATOR STOP DETECTOR setting the OS flag div 4 32768 Hz 8192 Hz stop(1) PRESCALER RESET 0 1 100 Hz tick 1 Hz tick CPR 1. stop is a combination of STOP register bit and the TS pin when programmed for stop control. Figure 32. CPR and STOP bit functional diagram PCF85263A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 5 — 1 February 2021 56 / 92 |
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