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PCF85263ATL/A Datasheet(PDF) 62 Page - NXP Semiconductors |
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PCF85263ATL/A Datasheet(HTML) 62 Page - NXP Semiconductors |
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62 / 92 page ![]() NXP Semiconductors PCF85263A Tiny Real-Time Clock/calendar with alarm function, battery switch-over, time stamp input, and I2C-bus Figure 37 shows the waveforms that can be expected. sample clock, vdd_int and stop are internal nodes. vdd_int is the supply which operates the IC and will be either VDD or VBAT, depending on the state of the battery switch-over. sample clock, 16 Hz t2 t4 t6 t3 TS pin switch SW 1 stop running stopwatch TSR2 INTA open open closed stopped running TSR2 = t4 TS pin sampled vdd_int floating VSS t5 aaa-010561 t1 Figure 37. Application example timing • At and before t1, SW1 is open (TS pin floating). The TS pin is sampled and the internal pull-up resistor will pull the pin HIGH to vdd_int. No actions are taken by the IC. • At t2, SW1 is still open. No action is taken by the IC. • At t3, SW1 closes. The TS pin is now shorted to VSS. The TS pin has not been sampled yet, so no action is taken by the IC. • At t4, SW1 is closed. The internal pull-up resistor is enabled, but TS pin remains LOW. The pin is then sampled and the LOW level detected. As the TSL bit was set for active LOW detection, the HIGH-LOW transition of TS pin sampled triggers an event. STOPM mode was configured to allow the TS pin to stop the time counting. As the TSL bit was set for active LOW, time counting stops when the TS pin is LOW. Timestamp register 2 was configured to take a copy of the time on an event of the TS pin, hence TSR2 loads the time t4. TSR2F is also set. INTA was configured to generate an interrupt when TSR2 loads a new time, hence an interrupt pulse is seen on INTA. • At t5, SW1 is opened. No action is taken by the IC. • At t6, SW1 is open. The internal pull-up is active and the TS pin raises to vdd_int level. The HIGH level is sampled and causes the stop signal to be released and time starts counting again. PCF85263A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 5 — 1 February 2021 62 / 92 |
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