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PCF85263ATL/A Datasheet(PDF) 66 Page - NXP Semiconductors |
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PCF85263ATL/A Datasheet(HTML) 66 Page - NXP Semiconductors |
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66 / 92 page ![]() NXP Semiconductors PCF85263A Tiny Real-Time Clock/calendar with alarm function, battery switch-over, time stamp input, and I2C-bus VDD = 0.9 V to 5.5 V; VSS = 0 V; Tamb = -40 °C to +85 °C; fosc = 32.768 kHz; quartz Rs = 60 kΩ; CL = 7 pF; all registers in reset state; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit output sink current; VOL = 0.4 V; VDD = 3.3 V on pin SDA 3 8.5 - mA on pin INTA 2 6 - mA on pin CLK 1 3 - mA IOL LOW-level output current on pin TS 1 3 - mA Oscillator Δfosc/fosc relative oscillator frequency variation ΔVDD = 200 mV; Tamb = 25 °C - 0.075 - ppm LOWJ = 0 [8] - 50 - ns tjit jitter time LOWJ = 1 - 25 - ns on pins OSCO, OSCI; VDD = 3.3 V [9] CL = 6 pF 4.8 6 7.2 pF CL = 7 pF 5.6 7 8.4 pF CL(itg) integrated load capacitance CL = 12.5 pF 10 12.5 15 pF Rs series resistance of the quartz; normal drive [10] - 60 100 kΩ Table 67. Characteristics...continued [1] For reliable oscillator start-up at power-on use VDD greater than 1.2 V. If powered up at 0.9 V the oscillator will start but it might be a bit slow, especially if at high temperature. Normally the power supply is not 0.9 V at start-up and only comes at the end of battery discharge. VDD min of 0.9 V is specified so that the customer can calculate how large a battery or capacitor they need for their application. VDD min of 1.2 V or greater is needed to ensure speedy oscillator start-up time. [2] 400 kHz I2C operation is production tested at 1.8 V. Design methodology allows I2C operation at 1.8 V - 5 % (1.71 V) which has been verified during product characterization on a limited number of devices. [3] Measured after reset and CLK disabled, level of inputs is VDD or VSS. [4] Measured after reset, CLK disabled, battery switch disabled and level of inputs is VDD or VSS. [5] The I2C-bus interface of PCF85263A is 5 V tolerant. [6] Implicit by design. [7] See Table 44. [8] See Table 32. [9] Integrated load capacitance, CL(itg), is a calculation of COSCI and COSCO in series. [10] See Table 33. PCF85263A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 5 — 1 February 2021 66 / 92 |
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